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EP7309/11/12 User’s Manual - DS508UM4 7-1

Chapter 7

7SDRAM Controller

Introduction

External SDRAM on the EP7311 and EP7312 is supported via the SDRAM controller.

It allows industry standard SDRAM memories to be used within the address space of

the EP73xx with no software overhead. The controller is attached to the ARM core

through the internal high speed bus. It operates at a maximum clock speed of

36.864 MHz (45 MHz when is CPU running at 90 MHz), providing all the necessary

connections to interface to two banks of SDRAM. For information on implementing

external SDRAM with the EP7312, see the Application Note, “Interfacing the EP7312

with SDRAM” (AN218). The EP7309 does not include the SDRAM controller.

Features

The SDRAM controller within the EP7311 and EP7312 provides a convenient method

for using inexpensive SDRAM devices as local memory.

It supports:

• Standard NEC or compatible devices in sizes of 16 to 256 Mbit, yielding a

total memory capacity of 2 to 64 MByte

•UptotwoexternalbanksofSDRAM

SDCS[0:1],andcontroloffour

internal banks for each SDRAM device.

• A programmable bus width for accessing 16 or 32 bit wide banks

• Putting the SDRAM devices into self-refresh mode when the CPU is put

into Standby

•Quadwordorquadhalfwordaccesseswithbytemaskselectsforshort

reads

• Internal multiplexing of address lines for contiguous memory access

• Automatic JEDEC Standard No. 21-C compliant SDRAM initialization

SDRAM Register List

Table 7-1: SDRAM Registers

Address Name Type Size Description Page

0x8000.2300 SDCONF R/W 16 SDRAM Control Register page 7-3

0x8000.2340 SDRFPR R/W 16 SDRAM Refresh Period Register page 7-4

1 2 ... 76 77 78 79 80 81 82 83 84 85 86 ... 157 158

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Cirrus-logic EP73xx Bedienungsanleitung Seite 81