Cirrus-logic EP73xx Bedienungsanleitung PDF herunterladen (Seite 49)

EP7309/11/12 User’s Manual - DS508UM4 4-3

Interrupt Controller

bne nextstatuscheck ; not the timer - moving down the IRQ routine

mov r2, #0x0

strb r2, [r0,#0x0] ; setting PA0-8 low

mov r2, #0xFFFFFFFF

str r2, [r0,0x06C0] ; Write to TC1EOI register - clear interrupt

; ........ code...........

subs pc, lr, #4 ; Return from interrupt to pending instruction

;

Operational Overview

Once an exception occurs, the ARM720T will attempt to complete the current

instruction (except for a system reset) and will then identify the interrupt type. The

interrupt vector table, already loaded by the system software contains a reference or

address of the specific interrupt routine for each type of exception identified by the

processor. The CPU will jump to the appropriate routinefor servicing of the interrupt.

The vector table for all interrupt types is as follows:

Within each routine for each interrupt type created by the system software, the

specific interrupt can be determined by examining any one of the three status

registers. After an action is taken, a write to the appropriate “End of Interrupt”

endless loop.

For severalinterrupts occurring simultaneously, the pre-determinedprioritybasedon

type of interrupt will cause the highest interrupt priority to execute first and queue

any remaining interrupts. Interrupts of the same type that occur simultaneously

simplyrequiresystemsoftwaretocheckallpossibleinterruptsforthespecifictype.

Table 4-2: Vector Addresses by Interrupt Type

Interrupt Vector Address

Reset 0x0

Undefined Instruction 0x4

Software Interrupt (SWI) 0x8

Prefetch Abort (Instruction fetch) 0xC

Data abort (Data access) 0x10

IRQ (normal interrupt) 0x18

FIQ (fast interrupt) 0x1C

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Cirrus-logic EP73xx Bedienungsanleitung Seite 49