Cirrus-logic CDB5366 Bedienungsanleitung

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Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
http://www.cirrus.com
Evaluation Board for CS5366
Features
! Single-Ended to Differential Analog Inputs
! 3.3 V Logic Interface
! Connection for DSP Serial I/O
! Windows®-Compatible CDB5366 Software
Supplied by Cirrus to Configure the
CS5366
!
On-Board CS8406 to Generate S/PDIF and
EIAJ-340 Digital Audio
! Requires Only an Analog Signal Source, Power
Supplies and, optionally, a PC for a Complete
Analog-to-Digital-Converter Evaluation System
Description
The CDB5366 evaluation board is an excellent means
for quickly evaluating the CS5366 24-bit, 192 kHz A/D
converter. Evaluation requires only a digital signal ana-
lyzer, an analog signal source, and a power supply.
On-board DIP switches configure the CS5366 in Stand-
Alone mode, avoiding the need for a PC.
For software-based device configuration, the Control
Port mode is used by attaching a host PC to the Evalu-
ation Board and executing the provided FlexGUI
software.
ORDERING INFORMATION
CDB5366 Evaluation Board
Ain+
Ain-
Clks/Data
Analog
Input
Buffers
RCA
Jacks
8051 Micro
RS232
USB
I²C or SPI
FPGA
Optical
Coaxial
CS8406
AES/EBU
S/PDIF
Transmitter
Buffers
Audio
6
6
6
CS5366 A/D
Clks/Data
Control
S/PDIF
Output
CDB5366
SEPTEMBER '05
DS626DB1
Seitenansicht 0
1 2 3 4 5 6 ... 23 24

Inhaltsverzeichnis

Seite 1 - Evaluation Board for CS5366

Copyright © Cirrus Logic, Inc. 2005(All Rights Reserved)http://www.cirrus.comEvaluation Board for CS5366Features! Single-Ended to Differential Analog

Seite 2 - LIST OF TABLES

10 DS626DB1CDB53664.2 SwitchesThe CDB5366 Evaluation Board switches are used for setting speed modes and format protocols and forresetting devices to

Seite 3 - 3. DETAILED BOARD FEATURES

DS626DB1 11CDB53664.5 Power Supply CircuitryPower is applied to the evaluation board through five binding posts (+5 V, +12 V, -12 V, VA and GND). TheG

Seite 4

12 DS626DB1CDB53665. SCHEMATICS Figure 4. CS5366 (Schematic page 1)

Seite 5 - 3.2 Control-Port Evaluation

DS626DB1 13CDB5366 Figure 5. Clock Generation (Schematic page 2)

Seite 6 - 3.3 FlexGUI Hi-Level View

14 DS626DB1CDB5366 Figure 6. FPGA (Schematic page 3)

Seite 7 - 3.4 FlexGUI Low-Level View

DS626DB1 15CDB5366 Figure 7. Control Port (Schematic page 4)

Seite 8 - 3.5 Bit Definitions

16 DS626DB1CDB5366 Figure 8. Clock and Data Buffers (Schematic page 5)

Seite 9 - 4. CDB5366 HARDWARE

17 DS626DB1CDB5366 Figure 9. CD8406 S/PDIF Output (Schematic page 6)

Seite 10 - 4.2 Switches

DS626DB1 18CDB5366 Figure 10. Analog Inputs 1 to 4 (Schematic page 7)

Seite 11

19 DS626DB1CDB5366 Figure 11. Analog Inputs 5 to 8 (Schematic page 8)

Seite 12 - 5. SCHEMATICS

2 DS626DB1CDB5366TABLE OF CONTENTS1. CDB5366 System Overview...

Seite 13 - DS626DB1 13

DS626DB1 20CDB5366 Figure 12. Power (Schematic page 9)

Seite 14 - 14 DS626DB1

21 DS626DB1CDB53666. BOARD LAYOUT AND ROUTING PLOTS Figure 13. Top Silkscreen

Seite 15 - DS626DB1 15

22 DS626DB1CDB5366 Figure 14. Top Layer

Seite 16 - 16 DS626DB1

DS626DB1 23CDB5366 Figure 15. Bottom Layer

Seite 17 - 17 DS626DB1

24 DS626DB1CDB53667. REVISION HISTORY Release Date ChangesDB1 September 2005 Initial ReleaseContacting Cirrus Logic SupportFor all product questions

Seite 18 - DS626DB1 18

DS626DB1 3CDB53661. CDB5366 SYSTEM OVERVIEWThe CDB5366 Evaluation Board provides an excellent means of quickly evaluating the CS5366. A digital audio

Seite 19 - 19 DS626DB1

4 DS626DB1CDB53663.1.1 S1 and S4 Switch OperationDIP Switch S1 contains six switches that function as described below.M1,M0 set the device Speed Mode

Seite 20 - DS626DB1 20

DS626DB1 5CDB53663.2 Control-Port EvaluationThe CDB5366 is shipped with a Cirrus Logic designed Microsoft Windows-based program that allows fullcontro

Seite 21 - 21 DS626DB1

6 DS626DB1CDB53663.3 FlexGUI Hi-Level ViewThe Cirrus Logic FlexGUI defaults to the Hi-Level View as shown in Figure 1. This view provides functionally

Seite 22 - 22 DS626DB1

DS626DB1 7CDB53663.4 FlexGUI Low-Level ViewThe Low-level Register Map view provides direct control over the CS5366, the FPGA and GPIO settingsthat cha

Seite 23 - DS626DB1 23

8 DS626DB1CDB53663.5 Bit Definitions3.5.1 CS5366 BitsThe Low-Level view of the FlexGUI provides the full register set of the CS5366 under the CS5366 t

Seite 24 - 7. REVISION HISTORY

DS626DB1 9CDB5366In TDM mode, SDOUT_SEL1 and SDOUT_SEL 0 extract two stereo pairs from the CS5366 TDM stream,convert the data to Left-Justified PCM fo

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