Cirrus-logic CS5373A Bedienungsanleitung

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Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
http://www.cirrus.com
CS5373A
Low-power, High-performance
ΔΣ
Modulator and Test DAC
Modulator Features
Fourth-order ΔΣ Architecture
Clock-jitter-tolerant architecture
Input signal bandwidth: DC to 2 kHz
Max AC amplitude: 5 V
pp
differential
Max DC amplitude: ± 2.5 V
dc
differential
High Dynamic Range
127 dB SNR @ 215 Hz BW (2 ms sampling)
124 dB SNR @ 430 Hz BW (1 ms sampling)
Low Total Harmonic Distortion
-118 dB THD typical (0.000126%)
-112 dB THD maximum (0.000251%)
Low Power Consumption: 25 mW, 10 µW
Test DAC Features
Digital ΔΣ Input from CS5378 Digital Filter
Selectable Differential Analog Outputs
Precision output (OUT±) for electronics tests
Buffered output (BUF±) for sensor tests
Multiple AC and DC Operational Modes
Output signal bandwidth: DC to 100 Hz
Max AC amplitude: 5 V
pp
differential
Max DC amplitude: + 2.5 V
dc
differential
Selectable Attenuation to Match CS3301A/02A
1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64
Outstanding Performance
OUT AC: -115 dB THD typical, -112 dB maximum
BUF AC: -105 dB THD typical, -95 dB maximum
OUT DC: Differential VREF ± 10 mV typical
BUF DC: Differential VREF ± 25 mV typical
Low Power Consumption
AC modes / DC modes: 40 mW / 25 mW
Sleep mode / Power down: 2.5 mW / 600 µW
Common Features
Extremely Small Footprint
28-pin SSOP package, 8 mm x 10 mm
Bipolar Power Supply Configuration
VA+ = +2.5 V; VA- = -2.5 V; VD = +3.3 V
Description
The CS5373A is a high-performance, fourth-order ΔΣ
modulator integrated with a ΔΣ digital-to-analog convert-
er (DAC). When combined with a CS3301A/02A
differential amplifier and the CS5378 digital filter, a
small, low-power, self-testing, high-accuracy, single-
channel measurement system results.
The modulator has high dynamic range and low total har-
monic distortion with very low power consumption. It
converts differential analog input signals from the
CS3301A/02A amplifier to an oversampled serial bit
stream at 512 kbits per second. This oversampled bit
stream is then decimated by the CS5378 digital filter to a
24-bit output at the selected output word rate.
The test DAC operates in either AC or DC test modes.
AC test modes measure system dynamic performance
through THD and CMRR tests while DC test modes are
for gain calibration and pulse tests. It has two sets of dif-
ferential analog outputs, OUT and BUF, as dedicated
outputs for testing the electronics channel and for in-
circuit sensor tests. Output attenuation settings are
binary weighted and match the gain settings of the
CS3301A/02A differential amplifiers for full-scale testing
at all gain ranges.
ORDERING INFORMATION
See page 39.
24-Bit
ΔΣ
Test DAC
Attenuator
1/1 to 1/64
Clock
Generator
VA+
MODE(0, 1, 2)ATT(0, 1, 2)
VD
VA-
VREF+ VREF-
GND
MCLK
MSYNC
24-Bit
ΔΣ
Modulator
OUT+
OUT-
BUF+
BUF-
TDATA
CAP+
CAP-
MDATA
MFLAG
INR+
INF+
INF-
INR-
OCT ‘10
DS703F2
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Inhaltsverzeichnis

Seite 1 - Modulator and Test DAC

Copyright  Cirrus Logic, Inc. 2010(All Rights Reserved)http://www.cirrus.comCS5373ALow-power, High-performance ΔΣ Modulator and Test DACModulator Fea

Seite 2 - TABLE OF CONTENTS

CS5373A10 DS703F2DAC AC DIFFERENTIAL MODES 1, 2, 3Notes: 22. Maximum amplitude for DAC operation above 100 Hz. A reduced amplitude for higher frequenc

Seite 3 - LIST OF TABLES

CS5373ADS703F2 11DAC AC DIFFERENTIAL MODES 1, 2, 3 (CONT.) Notes: 25. Specification measured using CS3301A amplifier at corresponding gain with the m

Seite 4 - ± 3% VD 3.20 3.30 3.40 V

CS5373A12 DS703F2DAC DC COMMON MODE 4Parameter Symbol Min Typ Max UnitDC Common Mode CharacteristicsCommon Mode Output VDCCM- (VA-)+2.35 -VCommon Mod

Seite 5 - ABSOLUTE MAXIMUM RATINGS

CS5373ADS703F2 13DAC DC DIFFERENTIAL MODE 5Notes: 28. DC differential output is chopper stabilized and includes low-level 32 kHz out-of-band noise whi

Seite 6 - ANALOG INPUT CHARACTERISTICS

CS5373A14 DS703F2DAC AC COMMON MODE 6Notes: 29. No AC common mode signal is output at 1/64 attenuation due to the attenuator architecture.30. Common m

Seite 7 - ± High-Z Output

CS5373ADS703F2 15DIGITAL CHARACTERISTICSNotes: 31. Device is intended to be driven with CMOS logic levels. Parameter Symbol Min Typ Max UnitDigital I

Seite 8 - MODULATOR CHARACTERISTICS

CS5373A16 DS703F2DIGITAL CHARACTERISTICS (CONT.)Notes: 32. MCLK is generated by the CS5378 digital filter. If MCLK is disabled, the device automatical

Seite 9 - PERFORMANCE PLOTS

CS5373ADS703F2 17DIGITAL CHARACTERISTICS (CONT.) MCLKMSYNCtMDATATDATA0(2.048 MHz)(512 kHz)(256 kHz)SYNCMFLAGFigure 4. System Timing DiagramMCLKMSYN

Seite 10

CS5373A18 DS703F2POWER SUPPLY CHARACTERISTICS Notes: 38. All outputs unloaded. Digital inputs forced to VD or GND respectively.39. Power supply reject

Seite 11

CS5373ADS703F2 192. GENERAL DESCRIPTIONThe CS5373A is a high-performance, fourth-order ΔΣ modulator integrated with a digital-to-analog converter (DAC

Seite 12 - DAC DC COMMON MODE 4

CS5373A2 DS703F2TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ... 4SPE

Seite 13 - DAC DC DIFFERENTIAL MODE 5

CS5373A20 DS703F23. SYSTEM DIAGRAM CS5373ATDATACAP+CAP-BUF+BUF-OUT+OUT-MCLKMSYNCGNDMODE1MODE2ATT 0ATT 1MODE0ATT 2VA-2.5 VVREF10 ΩVREF +VREF -100 µF

Seite 14 - DAC AC COMMON MODE 6

CS5373ADS703F2 214. POWER MODESThe CS5373A has five power modes. Modula-tor mode, AC test modes, and DC test modesare operational modes, while power d

Seite 15 - DIGITAL CHARACTERISTICS

CS5373A22 DS703F25. OPERATIONAL MODESThe CS5373A has seven operational modesand one sleep mode selected by the MODE2,MODE1, and MODE0 pins.5.1 Modulat

Seite 16

CS5373ADS703F2 235.1.4 Modulator Idle TonesThe CS5373A modulator is ΔΣ type and so canproduce ‘idle tones’ in the measurement band-width when the diff

Seite 17 - DS703F2 17

CS5373A24 DS703F2Differential AC test signals out of the CS5373Aconsist of two halves with equal but oppositemagnitude, varying about a common modevol

Seite 18 - POWER SUPPLY CHARACTERISTICS

CS5373ADS703F2 25calibration and differential pulse tests. In mode4, both sets of analog outputs (OUT and BUF)are enabled.5.3.2 DC DifferentialThe sec

Seite 19 - 2. GENERAL DESCRIPTION

CS5373A26 DS703F26. DIGITAL SIGNALSThe CS5373A is designed to operate with theCS5378 digital filter. The digital filter gener-ates the master clock an

Seite 20 - 3. SYSTEM DIAGRAM

CS5373ADS703F2 276.3 MDATA ConnectionThe CS5373A modulator outputs a ΔΣ serialbit stream to the MDATA pin, with a one’s den-sity proportional to the d

Seite 21 - 4. POWER MODES

CS5373A28 DS703F27. ANALOG SIGNALSThe CS5373A has multiple differential analoginputs and outputs. The modulator analog in-puts are separated into roug

Seite 22 - 5. OPERATIONAL MODES

CS5373ADS703F2 29The -3 dB corner of the input anti-alias filter isnominally set to the internal analog samplingrate divided by 64, which itself is a

Seite 23 - DS703F2 23

CS5373ADS703F2 37.5 DAC CAP± Connection ... 307.6 Ana

Seite 24 - Figure 11. AC Common Mode

CS5373A30 DS703F2tests and two external differential inputs. Oneexternal input is typically dedicated to sensormeasurements and the other to testing t

Seite 25 - Figure 12. DC Test Modes

CS5373ADS703F2 318. VOLTAGE REFERENCEThe CS5373A requires a 2.500 V precisionvoltage reference to be supplied to the VREF±pins.8.1 VREF Power SupplyTo

Seite 26 - 6. DIGITAL SIGNALS

CS5373A32 DS703F2with MCLK.The voltage reference external RC filter seriesresistor creates a voltage divider with theVREF input impedance to reduce th

Seite 27 - DS703F2 27

CS5373ADS703F2 339. POWER SUPPLIESThe CS5373A has a positive analog powersupply pin (VA+), a negative analog powersupply pin (VA-), a digital power su

Seite 28 - 7. ANALOG SIGNALS

CS5373A34 DS703F29.4 SCR Latch-upThe VA- pin is tied to the CS5373A CMOSsubstrate and must always be the most-nega-tive voltage applied to the device

Seite 29

CS5373ADS703F2 35• Full-scale Accuracy - Variation in the measured output voltage from the theoretical full-scale output voltage at1x attenuation. The

Seite 30 - ± since other capacitor

CS5373A36 DS703F211. PIN DESCRIPTION1234567821222324252627289101112 171819201314 1516Positive Capacitor Output CAP+Negative Capacitor Output CAP-Posit

Seite 31 - 8. VOLTAGE REFERENCE

CS5373ADS703F2 37ATT2, ATT1,ATT022, 23,24I Attenuation Range. Selects the output attenuation range.MODE2, MODE1, MODE025, 26,27I Mode Selection. Deter

Seite 32 - ± pins, and all

CS5373A38 DS703F212. PACKAGE DIMENSIONSNotes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold

Seite 33 - 9. POWER SUPPLIES

CS5373ADS703F2 3913.ORDERING INFORMATION 14.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as specified by

Seite 34 - 10.TERMINOLOGY

CS5373A4 DS703F21. CHARACTERISTICS AND SPECIFICATIONS• Min / Max characteristics and specifications are guaranteed over the Specified Operating Condit

Seite 35

CS5373A40 DS703F2Contacting Cirrus Logic SupportFor all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one n

Seite 36 - 11. PIN DESCRIPTION

CS5373ADS703F2 5TEMPERATURE CONDITIONSABSOLUTE MAXIMUM RATINGSWARNING: Operation at or beyond these limits may result in permanent damage to the devic

Seite 37

CS5373A6 DS703F2ANALOG INPUT CHARACTERISTICS Notes: 7. Maximum integrated noise over the measurement bandwidth for the voltage reference device attach

Seite 38 - 28L SSOP PACKAGE DRAWING

CS5373ADS703F2 7ANALOG OUTPUT CHARACTERISTICS Notes: 10. Guaranteed by design and/or characterization.11. Load on the precision OUT± outputs is normal

Seite 39 - 15.REVISION HISTORY

CS5373A8 DS703F2MODULATOR CHARACTERISTICSNotes: 13. The upper bandwidth limit is determined by the CS5378 digital filter cut-off frequency.14. No sign

Seite 40 - 40 DS703F2

CS5373ADS703F2 9PERFORMANCE PLOTSFigure 1. Modulator Noise PerformanceFigure 2. Modulator + Test DAC Dynamic Performance

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