Cirrus-logic CDB5374 Bedienungsanleitung

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Copyright © Cirrus Logic, Inc. 2009
(All Rights Reserved)
www.cirrus.com
CDB5374
Multichannel Marine Seismic Evaluation System
Features
z Four-channel Seismic Acquisition Node
CS5374 dual amplifier & ∆Σ modulator (2x)
CS5376A quad digital filter (1x)
CS4373A ∆Σ test DAC (1x)
Precision voltage reference
Clock recovery PLL
z On-board Microcontroller
SPI™ interface to digital filter
USB communication with PC
z PC Evaluation Software
Register setup & control
FFT frequency analysis
Time domain analysis
Noise histogram analysis
General Description
The CDB5374 board is used to evaluate the functionality
and performance of the Cirrus Logic multichannel ma-
rine seismic chip set. Data sheets for the CS5374,
CS5376A, and CS4373A devices should be consulted
when using the CDB5374 evaluation board.
Screw terminals connect external differential hydro-
phone sensors to the analog inputs of the measurement
channels. An on-board test DAC creates precision differ-
ential analog signals for in-circuit performance testing
without an external signal source.
The evaluation board includes an 8051-type microcon-
troller with hardware SPI
and USB serial interfaces.
The microcontroller communicates with the digital filter
via SPI and with the PC evaluation software via USB.
The PC software controls register and coefficient initial-
ization and performs time domain, histogram, and FFT
frequency analysis on captured data.
ORDERING INFORMATION
CDB5374 Evaluation Board
JAN ‘09
DS862DB1
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Inhaltsverzeichnis

Seite 1 - General Description

Copyright © Cirrus Logic, Inc. 2009(All Rights Reserved)www.cirrus.comCDB5374Multichannel Marine Seismic Evaluation SystemFeaturesz Four-channel Seism

Seite 2 - REVISION HISTORY

CDB537410 DS862DB1CDB5374 as an unknown USB device.• If prompted for a USB driver, skip to the next step. If not, using Windows Hardware Device Manage

Seite 3 - TABLE OF CONTENTS

CDB5374DS862DB1 111.4 Self-testing CDB5374Noise and distortion self-tests can be performed once hardware and software setup are complete.First, initia

Seite 4 - LIST OF TABLES

CDB537412 DS862DB1• Once the Setup panel is set, select Configure on the Digital Filter sub-panel.• After digital filter configuration is complete, cl

Seite 5 - 1.2 Hardware Setup

CDB5374DS862DB1 132. HARDWARE DESCRIPTION2.1 Block Diagram Major blocks of the CDB5374 evaluation board include:• CS5374 Dual Amplifier & ∆Σ Modul

Seite 6 - 1.2.1 Default Jumper Settings

CDB537414 DS862DB12.2 Analog Hardware2.2.1 Analog Inputs2.2.1.1 External Inputs - INA, INB, BNCExternal signals into CDB5374 are typically from piezoe

Seite 7

CDB5374DS862DB1 152.2.1.4 Input ProtectionSensor inputs must have circuitry to protect the analog electronics from voltage spikes as hydrophonescan pr

Seite 8

CDB537416 DS862DB12.2.2 Differential AmplifiersThe CS5374 amplifiers act as a low-noise gain stage for internal or external differential analog signal

Seite 9 - DS862DB1 9

CDB5374DS862DB1 17The amplifier outputs are connected to external 680 Ω series resistors and a differential anti-alias RC filteris created by connecti

Seite 10 - 10 DS862DB1

CDB537418 DS862DB12.2.4 Delta-Sigma Test DACThe CS4373A DAC creates differential analog signals for system tests. Multiple test modes are availableand

Seite 11 - 1.4.1 Noise test

CDB5374DS862DB1 192.2.5 Voltage ReferenceA voltage reference on CDB5374 creates a precision voltage from the regulated analog supplies for themodulato

Seite 12 - 1.4.2 Distortion Test

CDB53742 DS862DB1REVISION HISTORY Revision Date ChangesDB1 JAN 2009 Initial release.Contacting Cirrus Logic SupportFor all product questions and inqui

Seite 13 - DS862DB1 13

CDB537420 DS862DB12.3 Digital Hardware2.3.1 Digital FilterThe CS5376A quad digital filter performs filtering and decimation of four delta-sigma bit st

Seite 14 - 2.2.1 Analog Inputs

CDB5374DS862DB1 21Modulator ∆Σ data is input through the modulator interface.Test DAC ∆Σ data is generated by the test bit stream generator.Amplifier,

Seite 15 - 2.2.1.6 Common Mode Bias

CDB537422 DS862DB12.3.1.1 MCLK Conversion to ACLKThe CS5376A digital filter creates the analog sampling clock used by the CS5374 ∆Σ modulators andCS43

Seite 16 - 2.2.2.3 Anti-alias RC Filters

CDB5374DS862DB1 23output sync, reset;///////////////////////// signal assignments///////////////////////assign sck = ssi_mc? 1'bz:sck_mc;assign

Seite 17 - 2.2.3.2 Offset Enable - OFST

CDB537424 DS862DB12.3.3 Digital Control SignalsThe reset, synchronization, and timebreak signals to the CS5376A digital filter can be generated by pus

Seite 18 - 2.2.4 Delta-Sigma Test DAC

CDB5374DS862DB1 25Pin # Pin Name Assignment Description 1 P0.1 SDTKI_MC Token to start CS5376A data transaction 2 P0.0 SYNC_IO SYNC signal from R

Seite 19 - 2.2.5.2 Common Mode Bias

CDB537426 DS862DB1Many connections to the C8051F320 microcontroller are inactive by default, but are provided for conve-nience during custom reprogram

Seite 20 - 2.3.1 Digital Filter

CDB5374DS862DB1 27input on CDB5374 can receive a lower-frequency system clock and create a synchronous higher-frequen-cy clock using an on-board PLL.

Seite 21 - DS862DB1 21

CDB537428 DS862DB12.3.6 RS-485 TelemetryBy default, CDB5374 communicates with the PC evaluation software through the microcontroller USBport. Addition

Seite 22 - 2.3.2 Interface CPLD

CDB5374DS862DB1 29A microcontroller software connection is made when the SYNC_MC signal output is created by the micro-controller on command from the

Seite 23 - DS862DB1 23

CDB5374DS862DB1 3TABLE OF CONTENTSREVISION HISTORY ...

Seite 24 - 24 DS862DB1

CDB537430 DS862DB12.3.8 External ConnectorPower supplies and telemetry signals route to a 20-pin double row connector with 0.1" spacing (J26). Th

Seite 25 - DS862DB1 25

CDB5374DS862DB1 31The VA+ and VA- power supplies to the analog components on CDB5374 can be jumper-ed to use regu-lated bipolar power supplies (+2.5 V

Seite 26 - 2.3.5 Phase Locked Loop

CDB537432 DS862DB1The VD and VCORE power supplies on CDB5374 include reverse-biased Schottky diodes to ground toprotect against reverse voltages that

Seite 27 - 8.192, 16.384, 32.768 MHz

CDB5374DS862DB1 33arated into 4-wire INR+, INF+, INF-, INR- quad groups, and are routed with INF+ and INF- as a traditionaldifferential pair and INR+

Seite 28 - 2.3.6.1 CLK, SYNC

CDB537434 DS862DB12.5.4 Dual Row HeadersTo simplify signal tracing on CDB5374, all device pins connect to dual-row headers. These dual-row head-ers ar

Seite 29 - C - SCL, SDA, Bypass

CDB5374DS862DB1 353. SOFTWARE DESCRIPTION3.1 Menu BarThe menu bar is always present at the top of the software panels and provides typical File and He

Seite 30 - 2.4 Power Supplies

CDB537436 DS862DB13.2 About PanelThe About panel displays copyright information for the Cirrus Seismic Evaluation software.Click OK to exit this panel

Seite 31 - DS862DB1 31

CDB5374DS862DB1 373.3 Setup PanelThe Setup panel initializes the evaluation system to perform data acquisition. It consists of the followingsub-panels

Seite 32 - 2.5.2 Differential Pairs

CDB537438 DS862DB13.3.1 USB PortThe USB Port sub-panel sets up the USB communication interface between the PC and the target board.Control Description

Seite 33 - 2.5.3 Bypass Capacitors

CDB5374DS862DB1 393.3.2 Digital FilterThe Digital Filter sub-panel sets up the digital filter configuration options.By default the Digital Filter sub-

Seite 34 - 2.5.4 Dual Row Headers

CDB53744 DS862DB13.4.2 Statistics ... 463.4

Seite 35 - 3.1 Menu Bar

CDB537440 DS862DB13.3.3 Analog Front EndThe Analog Front End sub-panel configures the amplifier, modulator, and test DAC pin options. Pin op-tions are

Seite 36 - 3.2 About Panel

CDB5374DS862DB1 413.3.5 Gain/OffsetThe Gain / Offset sub-panel controls the digital filter GAIN and OFFSET registers for each channel.The OFFSET and G

Seite 37 - 3.3 Setup Panel

CDB537442 DS862DB13.3.6 Data CaptureThe Data Capture sub-panel collects samples from the target board and sets analysis parameters.When the Capture bu

Seite 38 - 3.3.1 USB Port

CDB5374DS862DB1 433.3.7 External MacrosMacros are generated within the Macros sub-panel on the Control panel. Once a macro has been builtit can either

Seite 39 - 3.3.2 Digital Filter

CDB537444 DS862DB13.4 Analysis PanelThe Analysis panel is used to display the analysis results on collected data. It consists of the followingcontrols

Seite 40 - 3.3.4 Test Bit Stream

CDB5374DS862DB1 453.4.1 Test SelectThe Test Select control sets the type of analysis to be run on the collected data set.Control DescriptionTime Domai

Seite 41 - 3.3.5 Gain/Offset

CDB537446 DS862DB13.4.2 StatisticsThe Statistics control displays calculated statistics for the selected analysis channel. For multichanneldata captur

Seite 42 - 3.3.6 Data Capture

CDB5374DS862DB1 473.4.4 CursorThe Cursor control is used to identify a point on the graph using the mouse and then display its plot values.When any po

Seite 43 - • M2 = . /macros/m2.mac

CDB537448 DS862DB13.5 Control PanelThe Control panel is used to write and read register settings and to send commands to the digital filter.It consist

Seite 44 - 3.4 Analysis Panel

CDB5374DS862DB1 493.5.1 DF RegistersThe DF Registers sub-panel writes and reads registers within the digital filter. Digital filter registers con-trol

Seite 45 - 3.4.1 Test Select

CDB5374DS862DB1 51. INITIAL SETUP1.1 Kit ContentsThe CDB5374 evaluation kit includes:• CDB5374 Evaluation Board• USB Cable (A to B)• Software Download

Seite 46 - 3.4.3 Plot Enable

CDB537450 DS862DB13.5.4 MacrosThe Macros sub-panel is designed to write a large number of registers with a single command. This al-lows the target eva

Seite 47 - DS862DB1 47

CDB5374DS862DB1 513.5.6 CustomizeThe Customize sub-panel sends commands to upload custom FIR and IIR filter coefficients, upload cus-tom test bit stre

Seite 48 - 3.5 Control Panel

CDB537452 DS862DB14. BILL OF MATERIALS CIRRUS LOGICCDB5374-Z_Rev_A.bomBILL OF MATERIAL (Page 1 of 2)Item Cirrus P/N Rev Description Qty Reference Desi

Seite 49 - 3.5.3 SPI

CDB5374DS862DB1 53CIRRUS LOGICCDB5374-Z_Rev_A.bomBILL OF MATERIAL (Page 2 of 2)Item Cirrus P/N Rev Description Qty Reference Designator MFG MFG P/N No

Seite 50 - 3.5.5 GPIO

CDB537454 DS862DB15. LAYER PLOTS

Seite 54 - 5. LAYER PLOTS

CDB537458 DS862DB1

Seite 55 - DS862DB1 55

CDB5374DS862DB1 59

Seite 56 - 56 DS862DB1

CDB53746 DS862DB11.2.1 Default Jumper Settings J27, J227, J327, J427CH1, CH2, CH3, CH4Analog Input SelectionsDAC_OUT+ 1 **2INA+DAC_OUT- 3 **4INA-DAC_

Seite 57 - DS862DB1 57

CDB537460 DS862DB1

Seite 58 - 58 DS862DB1

CDB5374DS862DB1 61

Seite 59 - DS862DB1 59

CDB537462 DS862DB16. SCHEMATICS

Seite 60 - 60 DS862DB1

CDB5374DS862DB1 63

Seite 61 - DS862DB1 61

CDB537464 DS862DB1

Seite 62 - 6. SCHEMATICS

CDB5374DS862DB1 65

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CDB537466 DS862DB1

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CDB5374DS862DB1 67

Seite 65 - DS862DB1 65

CDB537468 DS862DB1

Seite 66 - 66 DS862DB1

CDB5374DS862DB1 69

Seite 67 - DS862DB1 67

CDB5374DS862DB1 7 J11VA+ Voltage Selection+2.5VA 1 ---------- 2+5VA 3 **4EXT_VA+ 5 **6 J12VD Input Voltage SourceEXT_VA+ 1 **2EXT_VD 3 ---------- 4J

Seite 68 - 68 DS862DB1

CDB537470 DS862DB1

Seite 69 - DS862DB1 69

CDB5374DS862DB1 71

Seite 70 - 70 DS862DB1

CDB537472 DS862DB1

Seite 71 - DS862DB1 71

CDB5374DS862DB1 73

Seite 72 - 72 DS862DB1

CDB537474 DS862DB1

Seite 73 - DS862DB1 73

CDB5374DS862DB1 75

Seite 74 - 74 DS862DB1

CDB537476 DS862DB1

Seite 75 - DS862DB1 75

CDB5374DS862DB1 77

Seite 76 - 76 DS862DB1

CDB537478 DS862DB1

Seite 77 - DS862DB1 77

CDB53748 DS862DB11.2.2 Default DIP Switch Settings Table 5. RS-485 Default Jumper Settings J14I2C ClockSCL+ 1 **2SCL- 3 **4SCL 5 **6GND 7 **8J23I2C Cl

Seite 78 - 78 DS862DB1

CDB5374DS862DB1 91.3 Software Setup1.3.1 PC RequirementsThe PC hardware requirements for the Cirrus Seismic Evaluation system are:• Windows XP®, Windo

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