
AN232
2
2. Typical Connection Diagrams
Figure 1. CS5361 Typical Connection Diagram
Figure 2. CS5381 Typical Connection Diagram
FILT+
AINL+
AINL-
V
D
0.01µF
A/D CONVERTER
SCLK
CS5361
M/S
MCLK
AINR+
AINR-
VQ
47
µ
F
+
RST
VA V
L
+5V
1
µ
F
+5V to 2.5V
5.1
Ω
1
µ
F
+
+
+
SDOUT
GND
I
2
S/LJ
LRCK
GND
Power Down
and Mode
Settings
Audio Data
Processor
Timing Logic
and Clock
0.01 µF
HPF
M0
M1
REFGND
MDIV
+5 V to 3.3 V
1
µ
F
1
µ
F
+
Analog
Input
Buffer
(Section 8)
Analog
Input
Buffer
(Section 8)
OVFL
VL
10 kΩ
* Resistor may only be
used if VD is derived
from VA. If used, do
not drive any other
logic from VD
*
0.01µF
0.01 µF
0.01 µF0.01 µF
FILT+
AINL+
AINL-
VD
0.1
µ
F
A/D CONVERTER
SCLK
CS5381
M/S
MCLK
AINR+
AINR-
VQ
200 µ
F
+
RST
VA V L
+5V
1
µ
F
+5V to 2.5V
5.1
Ω
1
µ
F
+
+
+
SDOUT
GND
I
2
S/LJ
LRCK
GND
Power Down
and Mode
Settings
Audio Data
Processor
Timing Logic
and Clock
0.1
µ
F
0.1
µ
F
0.1
µF
0.1
µ
F
HPF
M0
M1
REFGND
MDIV
+5 V to 3.3 V
1
µ
F 0.1
µ
F
1
µ
F
+
Analog
Input
Buffer
(Section 8)
Analog
Input
Buffer
(Section 8)
OVFL
10 k
VL
*
*
Resistor may only
be used if VD is
derived from VA. If
used, do not drive
any other logic
from VD.
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