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Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
http://www.cirrus.com
3/25/08
15:11
CS5581
±2.5 V / 5 V, 200 kSps, 16-bit, High-throughput
∆Σ
ADC
Features & Description
Single-ended Analog Input
On-chip Buffers for High Input Impedance
Conversion Time = 5 µS
Settles in One Conversion
Linearity Error = 0.0008%
Signal-to-Noise = 80 dB
S/(N + D) = 80 dB
DNL = ±0.1 LSB Max.
Simple three/four-wire serial interface
Power Supply Configurations:
- Analog: +5V/GND; IO: +1.8V to +3.3V
- Analog: ±2.5V; IO: +1.8V to +3.3V
Power Consumption:
- ADC Input Buffers On: 85 mW
- ADC Input Buffers Off: 60 mW
General Description
The CS5581 is a single-channel, 16-bit analog-to-digital
converter capable of 200 kSps conversion rate. The input
accepts a single-ended analog input signal. On-chip buff-
ers provide high input impedance for both the AIN input
and the VREF+ input. This significantly reduces the drive
requirements of signal sources and reduces errors due to
source impedances. The CS5581 is a delta-sigma convert-
er capable of switching multiple input channels at a high
rate with no loss in throughput. The ADC uses a low-laten-
cy digital filter architecture. The filter is designed for fast
settling and settles to full accuracy in one conversion. The
converter's 16-bit data output is in serial format, with the
serial port acting as either a master or a slave. The convert-
er is designed to support bipolar, ground-referenced
signals when operated from ±2.5V analog supplies.
The converter can operate from an analog supply of 0-5V
or from ±2.5V. The digital interface supports standard logic
operating from 1.8, 2.5, or 3.3 V.
ORDERING INFORMATION:
See Ordering Information on page 32.
AIN
ACOM
CS
SCLK
SMODE
VREF+
VREF-
RDY
OSC/CLOCK
GENERATOR
CONV
BP/UP
DIGITAL CONTROL
SERIAL
INTERFACE
ADC
DIGITAL
FILTER
LOGIC
VL
MCLK
SDO
RST
DCR
VLR
V1-
V2-
BUFEN
V2+
V1+
CS5581
TST
VLR2
VLR3
MAR ‘08
DS796PP1
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Inhaltsverzeichnis

Seite 1 - General Description

Preliminary Product InformationThis document contains information for a new product.Cirrus Logic reserves the right to modify this product without not

Seite 2 - TABLE OF CONTENTS

CS558110 DS796PP13/25/0814:34 DIGITAL CHARACTERISTICSTA = TMIN to TMAX; VL = 3.3V, ±5% or VL = 2.5V, ±5% or 1.8V, ±5%; VLR = 0V Parameter Symbol Min T

Seite 3 - LIST OF TABLES

CS5581DS796PP1 113/25/0814:34GUARANTEED LOGIC LEVELSTA=-40to+85°C;V1+=V2+=+2.5V, ±5%; V1- = V2- = -2.5 V, ±5%;VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.

Seite 4 - ANALOG CHARACTERISTICS T

CS558112 DS796PP13/25/0814:34RECOMMENDED OPERATING CONDITIONS(VLR = 0V, see Note 16)16. The logic supply can be any value VL – VLR = +1.71 to +3.465 v

Seite 5 - (CONTINUED) T

CS5581DS796PP1 133/25/0814:342. OVERVIEWThe CS5581 is a 16-bit analog-to-digital converter capable of 200 kSps conversion rate. The analog inputaccep

Seite 6 - SWITCHING CHARACTERISTICS

CS558114 DS796PP13/25/0814:34Once a conversion is completed and RDY falls, RDY will return high when all the bits of the data word areemptied from the

Seite 7 - MSB MSB–1

CS5581DS796PP1 153/25/0814:343.3 Voltage ReferenceThe voltage reference for the CS5581 can range from 2.4 volt to 4.2 volts. A 4.096 volt reference i

Seite 8

CS558116 DS796PP13/25/0814:343.5 Output Coding FormatThe reference voltage directly defines the input voltage range in both the unipolar and bipolar

Seite 9

CS5581DS796PP1 173/25/0814:343.6 Typical Connection DiagramsThe following figure depicts the CS5581 powered from bipolar analog supplies, +2.5 V and

Seite 10 - DIGITAL CHARACTERISTICS

CS558118 DS796PP13/25/0814:34The following figure depicts the CS5581 part powered from a single 5V analog supply and configured forunipolar measuremen

Seite 11 - GUARANTEED LOGIC LEVELS

CS5581DS796PP1 193/25/0814:34The following figure depicts the CS5581 part powered from a single 5V analog supply and configured forbipolar measurement

Seite 12 - ABSOLUTE MAXIMUM RATINGS

CS55812 DS796PP13/25/0814:34TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Seite 13 - 3. THEORY OF OPERATION

CS558120 DS796PP13/25/0814:343.7 AIN & VREF Sampling StructuresThe CS5581 uses on-chip buffers on the AIN and the VREF+ inputs. Buffers provide m

Seite 14 - 3.2 Clock

CS5581DS796PP1 213/25/0814:34Figures 11 through 16 illustrate the performance of the CS5581 when driven by a 5.55 kHz sine wave atvarious amplitudes.

Seite 15 - 3.3 Voltage Reference

CS558122 DS796PP13/25/0814:34Figure 16 illustrates the noise floor of the converter from 0.1 Hz to 100 kHz. While the plot does exhibitsome 1/f noise

Seite 16 - 3.5 Output Coding Format

CS5581DS796PP1 233/25/0814:343.9 Digital Filter CharacteristicsThe digital filter is designed for fast settling, therefore it exhibits very little in

Seite 17 - ±2.5V Analog Supplies

CS558124 DS796PP13/25/0814:343.10 Serial PortThe serial port on the CS5581 can operate in two different modes: synchronous self clock (SSC) mode &

Seite 18 - 18 DS796PP1

CS5581DS796PP1 253/25/0814:343.12 Using the CS5581 in Multiplexing ApplicationsThe CS5581 is a delta-sigma A/D converter. Delta-sigma converters use

Seite 19 - DS796PP1 19

CS558126 DS796PP13/25/0814:34At the same time the converter is performing a conversion on a channel from one bank of multiplexers,the second multiplex

Seite 20 - 3.8 Converter Performance

CS5581DS796PP1 273/25/0814:343.13 Synchronizing Multiple ConvertersMany measurement systems have multiple converters that need to operate synchronous

Seite 21 - DS796PP1 21

CS558128 DS796PP13/26/0810:504. PIN DESCRIPTIONS CS – Chip Select, Pin 1The Chip Select pin allows an external device to access the serial port. When

Seite 22 - Output (Codes)

CS5581DS796PP1 293/25/0814:34BP/UP – Bipolar/Unipolar Select, Pin 11The BP/UP pin determines the span and the output coding of the converter. When set

Seite 23 - DS796PP1 23

CS5581DS796PP1 33/25/0814:34LIST OF FIGURESFigure 1. SSC Mode - Read Timing, CS remaining low . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Seite 24 - 3.10 Serial Port

CS558130 DS796PP13/25/0814:34SCLK – Serial Clock Input/Output, Pin 23The SMODE pin determines whether the SCLK signal is an input or an output signal.

Seite 25 - DS796PP1 25

CS5581DS796PP1 313/25/0814:345. PACKAGE DIMENSIONSNotes: 1.“D” and “E1” are reference datums and do not included mold flash or protrusions, but do i

Seite 26 - 26 DS796PP1

CS558132 DS796PP13/25/0814:346. ORDERING INFORMATION 7. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) a

Seite 27 - DS796PP1 27

CS55814 DS796PP13/25/0814:341. CHARACTERISTICS AND SPECIFICATIONS• Min / Max characteristics and specifications are guaranteed over the specified oper

Seite 28 - 4. PIN DESCRIPTIONS

CS5581DS796PP1 53/25/0814:34ANALOG CHARACTERISTICS (CONTINUED) TA = -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%; VL -VLR = 3.3 V,

Seite 29

CS55816 DS796PP13/25/0814:34SWITCHING CHARACTERISTICS TA= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;VL - VLR = 3.3 V, ±5%, 2.5 V

Seite 30

CS5581DS796PP1 73/25/0814:34SWITCHING CHARACTERISTICS (CONTINUED) TA= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;VL - VLR = 3.3 V

Seite 31 - 24L SSOP PACKAGE DRAWING

CS55818 DS796PP13/25/0814:34SWITCHING CHARACTERISTICS (CONTINUED) TA= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;VL - VLR = 3.3 V

Seite 32 - 8. REVISION HISTORY

CS5581DS796PP1 93/25/0814:34SWITCHING CHARACTERISTICS (CONTINUED) TA= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;VL - VLR = 3.3 V

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