Cirrus-logic CS4202 Bedienungsanleitung Seite 47

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Seitenansicht 46
CS4202
DS549PP2 47
PR Bit ADCs DACs Mixer
Analog
Reference
AC
Link
Internal
Clock Off
Headphone
PR0
PR1
PR2 •••
PR3 •••
PR4
PR5 ••
PR6
Table 16. Powerdown PR Function Matrix for the CS4202
Power State
I
DVdd
(mA)
[DVdd=3.3 V]
I
DVdd
(mA)
[DVdd=5 V]
I
AVdd1
(mA) I
AVdd2
(mA)
Full Power + SRC’s 25.2 40.2 31.3 5.1
Full Power + S/PDIF
1
30.0 46.6 31.3 5.1
Full Power + HP
2
26.4 41.5 32.1 39.5
Full Power 26.4 41.5 31.3 5.1
ADCs off (PR0) 24.0 37.9 23.2 4.9
DACs off (PR1) 24.3 38.4 25.8 5.0
Audio off (PR2) 21.9 34.9 3.8 0 µA
Vref off (PR3) 21.9 34.9 1.5 0 µA
AC-Link off (PR4) 21.8 35.3 31.2 5.1
Internal Clocks off (PR5) 3.8 6.3 19.0 4.6
HP amp off (PR6) 26.3 41.5 29.8 0 µA
Digital off (PR4+PR5) 10 µA 21 µA 19.0 4.6
All off (PR3+PR4+PR5) 10 µA 21 µA 1.3 0 µA
RESET 0.8 1.4 3.60 µA
Table 17. Power Consumption by Powerdown Mode for the CS4202
1
Assuming standard resistive load for transformer coupled coaxial S/PDIF output (Rload = 292 Ohm, DVdd
= 3.3 V) (Rload = 415 Ohm, DVdd = 5 V). General: I
DVdd S/PDIF
= I
DVdd
+ DVdd/Rload/2
2
HP_OUT_L, HP_OUT_R driving 4 Vpp into 32 Ohm resistive load.
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