Cirrus-logic CDB5571 Bedienungsanleitung

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Copyright Cirrus Logic, Inc. 2009
(All Rights Reserved)
www.cirrus.com
CDB5571
100 kSps, 16-bit, High-throughput
ΔΣ
ADC
Evaluation Board
Features
Analog Input Channels to the CS5571 ADC
Pre-configured to require a minimum number of external
connections to your data acquisition system.
All functionality accessible through the connector interface
and board-level options.
On-board 4.096 V Reference
Pre-configured for Master mode SPI™ communication to a
data capture system.
General Description
The CDB5571 is a versatile tool designed for evaluating the func-
tionality and performance of the CS5571 ADC (Analog-to-Digital
Converter). The SPI serial port on the CDB5571 evaluation board
is configured in Master mode and will start transmitting data after
power-up upon reset. This evaluation board is designed to connect
to your data capture system or will interface to the CapturePlus II
data acquisition system available from Cirrus Logic.
The CS5571 delta-sigma ADC produces fully settled conversions to
full specified accuracy at 100 kSps. This ability to produce fully set-
tled conversions for every sample makes it suitable for converting
multiplexed input signals. To help evaluate this feature, the
CDB5571 includes two single-ended analog inputs multiplexed into
the CS5571. The multiplexer can be switched at the CS5571 ADC
sample speed and the ADC will produce fully settled conversion data
for each input channel.
All evaluation board functionality for evaluating the CS5571 ADC is
accessed through the connector interface and board-level options.
Schematics in PADS™ PowerLogic™ format are available for
download at:
http://www.cirrus.com/en/products/pro/detail/P1120.html
.
ORDERING INFORMATION
CDB5571 Evaluation Board
OCT ‘09
DS768DB4
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Inhaltsverzeichnis

Seite 1 - Evaluation Board

Copyright  Cirrus Logic, Inc. 2009(All Rights Reserved)www.cirrus.comCDB5571100 kSps, 16-bit, High-throughput ΔΣ ADCEvaluation BoardFeatures Analog

Seite 2 - LIST OF TABLES

CDB557110 DS768DB4APPENDIX B. BILL OF MATERIALS CIRRUS LOGICCDB5571_REV_A4.PLBILL OF MATERIALItem Cirrus P/N Rev Descriptio

Seite 3 - 1. INTRODUCTION

CDB5571DS768DB4 11APPENDIX C. SCHEMATICS Figure 3. Schematic - Block Diagram

Seite 4 - 1.1 Overview

CDB557112 DS768DB4 Figure 4. Schematic - Power Supplies

Seite 5 - DC Supply

CDB5571DS768DB4 13 Figure 5. Schematic - Input Buffers and Multiplexer

Seite 6 - 3.3.1 Analog Input Buffers

CDB557114 DS768DB4 Figure 6. Schematic - CS5571

Seite 7 - 3.3.5 ADC Reference Frequency

CDB5571DS768DB4 15 Figure 7. Schematic - Configuration & Misc.

Seite 8 - 3.4.1 Hardware Configuration

CDB557116 DS768DB4APPENDIX D. LAYER PLOTS Figure 8. Top SilkscreenCalibration function has been removed fr

Seite 9 - A.2 Hardware Considerations

CDB5571DS768DB4 17 Figure 9. Top Solder Mask

Seite 10 - 10 DS768DB4

CDB557118 DS768DB4 Figure 10. Top Routing

Seite 11 - DS768DB4 11

CDB5571DS768DB4 19 Figure 11. Ground Plane

Seite 12 - 12 DS768DB4

CDB55712 DS768DB4TABLE OF CONTENTS1. INTRODUCTION ...

Seite 13 - DS768DB4 13

CDB557120 DS768DB4 Figure 12. Power Plane

Seite 14 - Figure 6. Schematic - CS5571

CDB5571DS768DB4 21 Figure 13. Bottom Solder Mask

Seite 15 - DS768DB4 15

CDB557122 DS768DB4 Figure 14. Bottom Silkscreen

Seite 16 - 16 DS768DB4

CDB5571DS768DB4 23 Figure 15. Top Solder Paste Mask

Seite 17 - Figure 9. Top Solder Mask

CDB557124 DS768DB4 Figure 16. Bottom Routing

Seite 18 - Figure 10. Top Routing

CDB5571DS768DB4 25APPENDIX E. CALIBRATION FUNCTIONThe calibration function has been removed from the CS5571. All references to calibration have been r

Seite 19 -

CDB557126 DS768DB4REVISION HISTORY Revision Date ChangesDB1 APR 2007 Initial Release.DB2 AUG 2007 Added 3.3.2 Mutiple

Seite 20 - Figure 12. Power Plane

CDB5571DS768DB4 31. INTRODUCTIONThe CDB5571 evaluation board is a platform for evaluating the CS5571 ADC performance. The evalua-tion board is design

Seite 21 - DS768DB4 21

CDB55714 DS768DB41.1 OverviewThe CDB5571 evaluation board has both analog and digital circuit sections. The analog section consistsof the CS5571 ADC,

Seite 22 - Figure 14. Bottom Silkscreen

CDB5571DS768DB4 52. QUICK START The CDB5571 evaluation board is designed to interface with a data acquisition system. To

Seite 23

CDB55716 DS768DB43. HARDWARE DESCRIPTION3.1 Absolute Maximum RatingsObserve the following limits to ensure the CDB5571 component ratings are not excee

Seite 24

CDB5571DS768DB4 7The analog inputs are designed for connections to single-ended input signals referenced to ground. Theusable input voltage range is

Seite 25 - DS768DB4 25

CDB55718 DS768DB43.4 Digital Section3.4.1 Hardware ConfigurationThe CDB5571 evaluation board hardware comes pre-configured so the only connection requ

Seite 26

CDB5571DS768DB4 9APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5571A.1 PCB Layout Considerations• Keep the signal path short between the CS5571 ADC

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