Cirrus-logic CDB5343 Bedienungsanleitung

Copyright © Cirrus Logic, Inc. 2006(All Rights Reserved)http://www.cirrus.comCDB5343: Evaluation Board for CS5343Features Demonstrates Recommended La

10 DS687DB2CDB5343-5+5-4-3-2-1+0+1+2+3+4dBFS20 20k50 100 200 500 1k 2k 5k 10kHz-130+0-120-110-100-90-80-70-60-50-40-30-20-10dB20 20k50 100 200 500 1k

DS687DB2 11CDB5343-100+0-90-80-70-60-50-40-30-20-10dBFS-120 +0-100 -80 -60 -40 -20dBr-40+40-35-30-25-20-15-10-5+0+5+10+15+20+25+30+35dBFS-140 +0-120 -

12 DS687DB2CDB534313.CDB PERFORMANCE CURVES13.1 Total Harmonic Distortion + Noise (THD+N)Figure 17 shows typical THD+N performance of the CS5343 insta

DS687DB2 13CDB534313.2 FFTlmFigure 18 shows a typical FFT of the output from the CS5343 on the CDB5343 with a 2 Vrms, 1 kHz sinewave input. For this p

DS687DB2 14CDB534314.CDB SCHEMATICS Figure 19. CDB Block Diagram

DS687DB2 15CDB5343Figure 20. CS5343 Analog-to-Digital Converter

DS687DB2 16CDB5343Figure 21. Analog Input

DS687DB2 17CDB5343Figure 22. Switches, Crystal Oscillator, and Clock Routing

DS687DB2 18CDB5343Figure 23. CS8406 S/PDIF Transmitter

19 DS687DB2CDB5343Figure 24. Power

2 DS687DB2CDB5343TABLE OF CONTENTS1. SYSTEM OVERVIEW ...

20 DS687DB2CDB534315.CDB LAYOUTFigure 25. CDB Silk-Screen

DS687DB2 21CDB5343Figure 26. Topside Layer

22 DS687DB2CDB5343Figure 27. Bottomside Layer

DS687DB2 23CDB534316.REVISION HISTORYRelease ChangesDB1 Initial ReleaseDB2 Added Performance PlotsContacting Cirrus Logic SupportFor all product quest

DS687DB2 3CDB5343LIST OF FIGURESFigure 1. FFT (-1 dB 48 kHz) ...

4 DS687DB2CDB53431. SYSTEM OVERVIEW The CDB5343 evaluation board is an excellent tool for evaluating the CS5343 Analog-to-Digital Converter (ADC).A mi

DS687DB2 5CDB5343The CS5343 generates sub-clocks when it is set for Master Mode via DIP switch S1. In this scenario, theCS8406 should be set to Slave

6 DS687DB2CDB53438. CONNECTORSTable 1 lists the connectors on the CDB5343, the reference designator of each connector, the directionality, and the ass

DS687DB2 7CDB5343Changing the state of this switch while the device is running will have no effect on the CS5343 as it mustbe reset to detect the chan

8 DS687DB2CDB534310.RESETThe CS5343 features Power-On Reset which means that performing a full reset of the CS5343 requires a power-cycling the device

DS687DB2 9CDB534312.PERFORMANCE PLOTS-130+0-120-110-100-90-80-70-60-50-40-30-20-10dBFS20 20k50 100 200 500 1k 2k 5k 10kHz-130+0-120-110-100-90-80-70-6