Cirrus-logic CS4362A Bedienungsanleitung

Copyright © Cirrus Logic, Inc. 2009(All Rights Reserved)http://www.cirrus.com114 dB, 192 kHz 6-Channel D/A ConverterFeatures Advanced Multi-bit Delta

10 DS617F2CS4362ADAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DQZ)Test Conditions (unless otherwise specified): VA = 4.75 to 5.25 V; VLS = 1.71 to 5.25 V

DS617F2 11CS4362APOWER AND THERMAL CHARACTERISTICS Notes:4. Current consumption increases with increasing FS within a given speed mode and is signa

12 DS617F2CS4362ACOMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSEThe filter characteristics have been normalized to the sample rate (Fs) an

DS617F2 13CS4362ACOMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE(CONTINUED)DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSEParame

14 DS617F2CS4362ADIGITAL CHARACTERISTICS13. Any pin except supplies. Transient currents of up to ±100 mA on the input pins will not cause SCR latch-up

DS617F2 15CS4362ASWITCHING CHARACTERISTICS - PCM(Inputs: Logic 0 = GND, Logic 1 = VLS, CL = 30 pF) Notes:14. After powering up, RST should be held l

16 DS617F2CS4362ASWITCHING CHARACTERISTICS - DSD(Logic 0 = AGND = DGND; Logic 1 = VLS; CL=20pF) Parameter Symbol Min Typ Max UnitMCLK Duty Cycle 4

DS617F2 17CS4362ASWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT(Inputs: Logic 0 = GND, Logic 1 = VLC, CL=30pF)Notes:16. Data must be held for s

18 DS617F2CS4362ASWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT (Inputs: Logic 0 = GND, Logic 1 = VLC, CL=30pF)Notes:17. tspi only needed befor

DS617F2 19CS4362A3. TYPICAL CONNECTION DIAGRAM VLSMCLKVDAOUTA1+8320.1 µF+1 µF +2.5 VSDIN191 µF0.1 µF++2021FILT+CMOUT76LRCKSCLKSDIN3

2 DS617F2CS4362ATABLE OF CONTENTS1. PIN DESCRIPTION ...

20 DS617F2CS4362A VLSCS4362AMCLKVDAOUTA1+8320.1 µF+1 µF+2.5 VSDIN191 µF

DS617F2 21CS4362A4. APPLICATIONS The CS4362A serially accepts two’s-complement formatted PCM data at standard audio sample rates including 48,44.1, an

22 DS617F2CS4362AM1(DIF1)M0(DIF0)DESCRIPTION FORMAT FIGURE00Left-justified, up to 24-bit data0 Figure 701I²S, up to 24-bit data1 Figure 810Right-justi

DS617F2 23CS4362A4.3 Digital Interface Formats The serial port operates as a slave and supports the I²S, Left-justified, and Right-justified digital i

24 DS617F2CS4362A4.4 Oversampling ModesThe CS4362A operates in one of three oversampling modes based on the input sample rate. Mode selectionis determ

DS617F2 25CS4362AIn Software Mode, the required de-emphasis filter coefficients for 32 kHz, 44.1 kHz, or 48 kHz are selectedvia the de-emphasis contro

26 DS617F2CS4362A4.8 Direct Stream Digital (DSD) ModeIn Stand-alone Mode, DSD operation is selected by holding DSD_EN(LRCK) high and applying the DSDd

DS617F2 27CS4362A 4.11 Mute ControlThe Mute Control pins go active during power-up initialization, muting, or if the MCLK-to-LRCK ratio is in-correct

28 DS617F2CS4362AUse of the Mute Control function is not mandatory but recommended for designs requiring the absolute min-imum in extraneous clicks an

DS617F2 29CS4362A4.13 Recommended Procedure for Switching Operational ModesFor systems where the absolute minimum in clicks and pops is required, it i

DS617F2 3CS4362A6.2.1 Digital Interface Format (DIF) ...

30 DS617F2CS4362A4.14.2.2 I²C ReadTo read from the device, follow the procedure below while adhering to the Control Port Switching Speci-fications.1.

DS617F2 31CS4362A6. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bringCS high, and follow the

32 DS617F2CS4362A5. REGISTER QUICK REFERENCEAddr Function 7 6 5 4 3 2 1 001h Mode Control 1 CPEN FREEZE MCLKDIV Reserved DAC3_DIS DAC2_DIS DAC1_DIS PD

DS617F2 33CS4362A6. REGISTER DESCRIPTIONNote: All registers are read/write in I²C Mode and write only in SPI, unless otherwise noted.6.1 Mode Control

34 DS617F2CS4362A6.1.5 Power Down (PDN)Default = 10 - Disabled1 - EnabledFunction:The entire device will enter a low-power state when this function is

DS617F2 35CS4362ADSD Mode: The relationship between the oversampling ratio of the DSD audio data and the requiredmaster clock-to-DSD-data-rate is defi

36 DS617F2CS4362A6.3.2 Single Volume Control (SNGLVOL) Default = 00 - Disabled1 - EnabledFunction:The individual channel volume levels are independent

DS617F2 37CS4362A6.3.6 Mute Pin Control (MUTEC1, MUTEC0)Default = 0000 - Six mute control signals01, 10 - One mute control signal11 - Three mute cont

38 DS617F2CS4362Aues. When this bit is enabled, the DAC will ramp down the volume prior to a filter-mode change and rampfrom mute to the original volu

DS617F2 39CS4362A6.6.2 ATAPI Channel Mixing and Muting (ATAPI)Default = 01001 - AOUTAx=aL, AOUTBx=bR (Stereo)Function:The CS4362A implements the chann

4 DS617F2CS4362ALIST OF FIGURESFigure 1.Serial Audio Interface Timing ...

40 DS617F2CS4362A6.6.3 Functional Mode (FM)Default = 0000 - Single-Speed Mode (4 to 50 kHz sample rates)01 - Double-Speed Mode (50 to 100 kHz sample r

DS617F2 41CS4362A6.7.2 Volume Control (XX_VOL)Default = 0 (No attenuation)Function:The Digital Volume Control registers allow independent control of

42 DS617F2CS4362A7. FILTER PLOTS0.4 0.5 0.6 0.7 0.8 0.9 1−120−100−80−60−40−200Frequency(normalized to Fs)Amplitude (dB)0.4 0.42 0.44 0.46 0.48 0.5 0.5

DS617F2 43CS4362A 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−0.02−0.015−0.01−0.00500.0050.010.0150.02Frequency(normalized to Fs)Amplitude (dB)0.

44 DS617F2CS4362A 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1120100806040200Frequency(normalized to Fs)Amplitude (dB)0.2 0.3 0.4 0.5 0.6 0.7 0.812010080604020

DS617F2 45CS4362A 0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55109876543210Frequency(normalized to Fs)Amplitude (dB)0 0.05 0.1 0.15 0.2 0.25

46 DS617F2CS4362A8. PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all other

DS617F2 47CS4362A9. PACKAGE DIMENSIONSINCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA --- 0.055 0.063 --- 1.40 1.60A1 0.002 0.004 0.006 0.05 0.10 0.15B

48 DS617F2CS4362A10.ORDERING INFORMATION11.REFERENCES1. How to Achieve Optimum Performance from Delta-Sigma A/D & D/A Converters, by Steven Harris

DS617F2 49CS4362A12.REVISION HISTORYRelease ChangesPP1Updated output impedance spec in “DAC Analog Characteristics - Automotive (-DQZ)” on page 10.Imp

DS617F2 5CS4362ALIST OF TABLESTable 1. Common Clock Frequencies ...

50 DS617F2CS4362AContacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one

6 DS617F2CS4362A1. PIN DESCRIPTIONPin Name # Pin DescriptionVD 4Digital Power (Input) - Positive power supply for the digital section. Refer to the Re

DS617F2 7CS4362AVQ 21Quiescent Voltage (Output) - Filter connection for internal quiescent voltage. VQ must be capacitively coupled to analog ground,

8 DS617F2CS4362A2. CHARACTERISTICS AND SPECIFICATIONSRECOMMENDED OPERATING CONDITIONS(GND = 0 V; all voltages with respect to ground.) ABSOLUTE MAXIMU

DS617F2 9CS4362ADAC ANALOG CHARACTERISTICS - COMMERCIAL (-CQZ)Test Conditions (unless otherwise specified): VA = VLS = VLC = 5 V; VD = 2.5 V; TA = 25°