Cirrus-logic EP7312 Bedienungsanleitung Seite 4
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4 Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved) DS508F2
EP7312
High-Performance, Low-Power System on Chip
SSI2 Interface ..................................................................................................................................................... 27
LCD Interface ...................................................................................................................................................... 28
JTAG Interface .................................................................................................................................................... 29
Packages ...........................................................................................................................................30
208-Pin LQFP Package Characteristics ............................................................................................................. 30
208-Pin LQFP Pin Diagram ................................................................................................................................ 31
208-Pin LQFP Numeric Pin Listing ..................................................................................................................... 32
256-Ball PBGA Package Characteristics ............................................................................................................ 38
256-Ball PBGA Pinout (Top View) ....................................................................................................................... 39
256-Ball PBGA Ball Listing ................................................................................................................................. 40
JTAG Boundary Scan Signal Ordering ............................................................................................................... 45
CONVENTIONS .................................................................................................................................50
Acronyms and Abbreviations .............................................................................................................................. 50
Units of Measurement ......................................................................................................................................... 50
General Conventions .......................................................................................................................................... 51
Pin Description Conventions ............................................................................................................................... 51
Ordering Information .......................................................................................................................52
Environmental, Manufacturing, & Handling Information .............................................................52
Revision History ..............................................................................................................................53
- EP7312 Data Sheet 1
- FEATURES (cont) 2
- OVERVIEW (cont.) 2
- Table of Contents 3
- List of Figures 5
- List of Tables 5
- Processor Core - ARM720T 6
- Power Management 6
- MaverickKey 6
- Unique ID 6
- Memory Interfaces 6
- Digital Audio Capability 7
- Universal Asynchronous 7
- Receiver/Transmitters (UARTs) 7
- Digital Audio Interface (DAI) 7
- CODEC Interface 8
- Synchronous Serial Interface 8
- LCD Controller 8
- 64-Key Keypad Interface 8
- Interrupt Controller 9
- Real-Time Clock 9
- PLL and Clocking 9
- Pin Multiplexing 11
- System Design 12
- ELECTRICAL SPECIFICATIONS 13
- STANDBY 14
- Timing Diagram Conventions 15
- Timing Conditions 15
- SDRAM Interface 16
- SDRAM Burst Read Cycle 18
- SDRAM Burst Write Cycle 19
- SDRAM Refresh Cycle 20
- Static Memory 21
- SSI1 Interface 26
- SSI2 Interface 27
- LCD Interface 28
- JTAG Interface 29
- Packages 30
- 208-Pin LQFP 31
- (All Rights Reserved) DS508F2 32
- (All Rights Reserved) 33 33
- (All Rights Reserved) 35 35
- (All Rights Reserved) 37 37
- (All Rights Reserved) 39 39
- 256-Ball PBGA Ball Listing 40
- (All Rights Reserved) 41 41
- (All Rights Reserved) 43 43
- CONVENTIONS 50
- General Conventions 51
- Pin Description Conventions 51
- Ordering Information 52
- Revision History 53
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