Cirrus-logic CS5464 Bedienungsanleitung Seite 33
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CS5464
DS682F3 33
8.3 Page 1 Registers
8.3.1 DC Offset for Current (I1
OFF
, I2
OFF
) and Voltage (V1
OFF
, V2
OFF
)
Address: 0 (I1
OFF
), 2 (V1
OFF
), 7 (I2
OFF
), 9 (V2
OFF
)
Default = 0
DC offset registers
I1
OFF
& V1
OFF
(I2
OFF
& V2
OFF
) are initialized to zero on reset. During DC offset calibration,
selected registers are written with the inverse of the DC offset measured. The application program can also write
the DC offset register values. These are two's complement values in the range of -1.0
value 1.0, with the
binary point to the right of the MSB.
8.3.2 Gain for Current (I1
GAIN
, I2
GAIN
) and Voltage (V1
GAIN
, V2
GAIN
)
Address: 1 (I1
GAIN
), 3 (V1
GAIN
), 8 (I2
GAIN
), 10 (V2
GAIN
)
Default = 1.0
Gain registers
I1
GAIN
& V1
GAIN
(I2
GAIN
& V2
GAIN
)
are initialized to 1.0 on reset. During AC or DC gain calibration,
selected register are written with the multiplicative inverse of the gain measured. These are unsigned fixed-point
values in the range of 0
value 4.0, with the binary point to the right of the second MSB.
8.3.3 Power Offset (P1
OFF
, P2
OFF
)
Address: 4 (P1
OFF
), 11 (P2
OFF
)
Default = 0
Power offset
P1
OFF
(P2
OFF
) is added to instantaneous power and averaged over a low-rate interval to yield
P1
AVG
(P2
AVG
) register results. It can be used to reduce systematic energy errors. These are two's complement
values in the range of -1.0
value 1.0, with the binary point to the right of the MSB.
8.3.4 AC Offset for Current (I1
ACOFF
, I2
ACOFF
) and Voltage (V1
ACOFF
, V2
ACOFF
)
Address: 5 (I1
ACOFF
), 6 (V1
ACOFF
), 12 (I2
ACOFF
), 13 (V2
ACOFF
)
Default = 0
AC offset registers
I1
ACOFF
& V1
ACOFF
(V
ACOFF
& V2
ACOFF
)
are initialized to zero on reset. These are added to
the RMS results before being stored to the RMS result registers. They can be used to reduce systematic errors
in the RMS results. These are two's complement values in the range of -1.0
value 1.0, with the binary point
to the right of the MSB.
MSB LSB
-(2
0
)2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
.....
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
2
-23
MSB LSB
2
1
2
0
2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
.....
2
-16
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
MSB LSB
-(2
0
)2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
.....
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
2
-23
MSB LSB
-(2
0
)2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
.....
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
2
-23
- Features & Description 1
- Description 1
- TABLE OF CONTENTS 2
- DS682F3 3 3
- LIST OF FIGURES 4
- LIST OF TABLES 4
- 1. OVERVIEW 5
- 2. PIN DESCRIPTION 6
- ANALOG CHARACTERISTICS 7
- --------- 8
- VOLTAGE REFERENCE 9
- DIGITAL CHARACTERISTICS 10
- SWITCHING CHARACTERISTICS 11
- 12 DS682F3 12
- ABSOLUTE MAXIMUM RATINGS 13
- 4. SIGNAL PATH DESCRIPTION 14
- 4.7 RMS Results 15
- 4.5 High-pass Filters 15
- 4.6 Low-Rate Calculations 15
- 4.8 Power and Energy Results 16
- 4.9 Peak Voltage and Current 16
- 4.10 Power Offset 16
- 5. PIN DESCRIPTIONS 17
- 5.2.5 Serial Interface 18
- 6. SETTING UP THE CS5464 19
- 6.8 No Load Threshold 20
- 6.9 Energy Pulse Width 20
- 6.10 Energy Pulse Rate 20
- 6.12 Epsilon 21
- 6.13 Temperature Measurement 21
- 7. USING THE CS5464 22
- 7.4 Command Interface 23
- 7.5 Register Paging 23
- 7.6 Commands 24
- 7.6.4 Calibration 25
- 26 DS682F3 26
- Page register at address 31 26
- DS682F3 27 27
- 8. REGISTER DESCRIPTIONS 28
- 32 DS682F3 32
- 8.3 Page 1 Registers 33
- 8.4 Page 2 Registers 38
- 9.1 Calibration 39
- 9.1.1 Offset Calibration 39
- 9.1.2 Gain Calibration 40
- 9.1.3 Calibration Order 40
- Connector to Calibrator 41
- 42 DS682F3 42
- 28L SSOP PACKAGE DRAWING 43
- 13. ORDERING INFORMATION 44
- 15. REVISION HISTORY 45
- 46 DS682F3 46
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