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CS4299
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4.14 Extended Audio ID Register (Index 28h)
ID[1:0] Codec Configuration ID. When ID[1:0] = 00, the CS4297A is the primary audio codec. When
ID[1:0] = 01, 10, or 11, the CS4297A is a secondary audio codec. The state of the ID[1:0] bits
is determined at power-up from the ID[1:0]# pins.
AMAP Audio Slot Mapping. The AMAP bit indicates whether the optional AC ’97 2.1 compliant AC-link
slot to audio DAC mapping is supported. This bit is a shadow of the AMAP bit in the AC Mode
Control Register (Index 5Eh). The PCM playback and capture slots are mapped according to
Table 8 on page 30.
VRA Variable Rate PCM Audio. The VRA bit indicates whether variable rate PCM audio is supported.
This bit always returns ‘1’, indicating that variable rate PCM audio is available.
Default x201h. Where x is determined by the state of ID[1:0]# input pins. The Extended Audio ID Reg-
ister (Index 28h) is a read only register.
4.15 Extended Audio Status/Control Register (Index 2Ah)
VRA Enable Variable Rate Audio. When ‘set’, the VRA bit allows access to the PCM Front DAC Rate
Register (Index 2Ch) and the PCM L/R ADC Rate Register (Index 32h). The bit must be ‘set’ in
order to use variable PCM playback or capture rates. The VRA bit also serves as a powerdown
for the DAC and ADC SRC blocks. Clearing VRA will reset the PCM Front DAC Rate Register
(Index 2Ch) and the PCM L/R ADC Rate Register (Index 32h) to their default values. The SRC
data path is flushed and the Slot Request bits for the currently active DAC slots will be fixed at
‘0’.
Default 0000h
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
ID1ID00000AMAP00000000VRA
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
000000000000000VRA
28 DS319PP6
CS4299
- CrystalClear 1
- SoundFusion™ Audio Codec ‘97 1
- TABLE OF CONTENTS 2
- LIST OF FIGURES 3
- LIST OF TABLES 4
- CS4299-KQZ only) 6
- 7
- CODEC_READY 8
- 2. GENERAL DESCRIPTION 10
- 2.1 AC-Link 10
- 2.2 Control registers 10
- 2.3 Sample Rate Converters 11
- 2.4 Output Mixer 11
- 2.5 Input Mux 11
- 2.6 Volume Control 11
- 3. AC LINK FRAME DEFINITION 13
- 3.2 AC-Link Audio Input Frame 16
- 18 DS319PP6 18
- 4. REGISTER INTERFACE 19
- Mute0000000000GN4GN3GN2GN1GN0 22
- 00000SL2SL1SL000000SR2SR1SR0 25
- 003D000MIXMSLPBK0000000 26
- 000000000000S3S2S1S0 26
- ID1ID00000AMAP00000000VRA 28
- 000000000000000VRA 28
- 0000000DDMAMAP0SM1SM00000 30
- 5. POWER MANAGEMENT 33
- 5.1 AC ’97 Reset Modes 33
- 5.1.1 Cold AC ‘97 Reset 33
- 5.1.2 Warm AC ’97 Reset 33
- 5.1.3 Register AC ’97 Reset 33
- 5.2 Powerdown Controls 34
- DVdd S/PDIF 35
- 6. ANALOG HARDWARE 36
- DESCRIPTION 36
- 6.1 Analog Inputs 36
- 6.1.1 Line-Level Inputs 36
- 6.1.2 CD Input 36
- 6.1.3 Microphone Inputs 37
- 6.1.4 PC Beep Input 37
- 6.1.5 Phone Input 38
- 6.2 Analog Outputs 38
- 6.2.1 Stereo Outputs 38
- 6.2.2 Mono Output 38
- 6.4 Power Supplies 39
- 6.5 Reference Design 39
- 7. SONY/PHILIPS DIGITAL 40
- INTERFACE (S/PDIF) 40
- 8. GROUNDING AND LAYOUT 40
- DS319PP6 41 41
- CS4299-xQ 42
- Audio I/O 43
- Clock and Configuration 44
- Misc. Digital Interfaces 45
- Power Supplies 46
- 11. REFERENCE DESIGN 49
- 12. REFERENCES 50
- 48L LQFP PACKAGE DRAWING 51
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