Cirrus-logic CDB42L73 Bedienungsanleitung

Copyright  Cirrus Logic, Inc. 2010(All Rights Reserved)http://www.cirrus.comEvaluation Board for the CS42L73Features Analog Inputs– Line-level In vi

10 DS882DB1CDB42L73Table 2. CDB42L73 Jumper SettingsJ54 LINEIN_REF Line input reference to GND select[*] ShuntedOpenLine input shield connection of J3

DS882DB1 11CDB42L73Table 3. LED InformationNote: All settings denoted by the symbol [*] are the Default Factory Settings.D5 VA OnOffIndicates the CS42

12 DS882DB1CDB42L734. SOFTWARE CONTROL USING FLEXGUI4.1 Installation and First-time SetupThe Cirrus Logic FlexGUI application is a graphical user inte

DS882DB1 13CDB42L73To restore one of several standard configurations pre-defined at the factory, load the register settingsstarting with “Factory_Defa

14 DS882DB1CDB42L734.3.1 S/PDIF TabThe “S/PDIF” tab contains the main controls for setting up the S/PDIF interface of the CDB42L73. A briefdescription

DS882DB1 15CDB42L734.3.2 Power TabThe “Power” tab contains the main controls for setting the power options of all functional blocks in theCS42L73. A b

16 DS882DB1CDB42L734.3.3 Clocking XSP VSP ASP TabThe “Clocking XSP VSP ASP” tab contains the main controls for setting the clocking related options of

DS882DB1 17CDB42L734.3.4 Analog Input TabThe “Analog Input” tab contains the main controls for setting the analog input circuitry options of theCS42L7

18 DS882DB1CDB42L734.3.5 Input DSP TabThe “Input DSP” tab contains the main controls for setting the digital signal processing applied to the an-alog

DS882DB1 19CDB42L734.3.6 Digital Mixer 1 TabThe “Digital Mixer 1” tab contains the main controls for setting the digital mixing/routing options for al

2 DS882DB1CDB42L73TABLE OF CONTENTS1. QUICK SETUP GUIDE ...

20 DS882DB1CDB42L734.3.7 Digital Mixer 2 TabThe “Digital Mixer 2” tab contains the main controls for setting the digital signal mixing/routing to the

DS882DB1 21CDB42L734.3.8 Output DSP TabThe “Output DSP” tab contains the main controls for setting the digital signal processing applied to theanalog

22 DS882DB1CDB42L734.3.9 Analog Output TabThe “Analog Output” tab contains the main controls for setting the analog output circuitry options of theCS4

DS882DB1 23CDB42L734.4 The Register MapThe register map shows the entire user configurable register space for all programmable devices on theCDB42L73.

DS882DB1 24CDB42L735. SCHEMATICS AND LAYOUT USB+5V, GND(Bind. Post)VA, VP, VCP, VL, VD_FILT(Bind. Post)Battery – VP only(Header)RegulatorsPower S

DS882DB1 25CDB42L73Figure 17. CS42L73

DS882DB1 26CDB42L73Figure 18. USB and Microcontroller

DS882DB1 27CDB42L73Figure 19. S/PDIF Receiver and Transmitter; Clock Buffers

DS882DB1 28CDB42L73Figure 20. Power

DS882DB1 29CDB42L73Figure 21. Top Side Silkscreen

DS882DB1 3CDB42L73Figure 20. Power ...

DS882DB1 30CDB42L73Figure 22. Layer 1

DS882DB1 31CDB42L73Figure 23. Layer 2

DS882DB1 32CDB42L73Figure 24. Layer 3

DS882DB1 33CDB42L73Figure 25. Layer 4

DS882DB1 34CDB42L73Figure 26. Layer 5

DS882DB1 35CDB42L73Figure 27. Layer 6

36 DS882DB1CDB42L736. REVISION HISTORY Release ChangesDB1 Initial ReleaseContacting Cirrus Logic SupportFor all product questions and inquiries, conta

4 DS882DB1CDB42L731. QUICK SETUP GUIDEThis section describes a short procedure to set the CDB42L73 to a standard state for evaluation.1. Return all ju

DS882DB1 5CDB42L732. THE CDB42L73 SYSTEM OVERVIEWThe CDB42L73 evaluation board is a convenient platform for evaluating the CS42L73 ultralow-power mobi

6 DS882DB1CDB42L732.4 Analog InputsLine input (via 2x mono RCA jacks) and microphone input (via 2x mono 1/8-inch jacks) are available on theCDB42L73.

DS882DB1 7CDB42L732.8 CS42L73 Ultralow Power Mobile Audio and Telephony CODECThe CS42L73 is a highly integrated, ultralow power, audio and telephony C

8 DS882DB1CDB42L733. SYSTEM CONNECTIONS AND JUMPER SETTINGSBoard connections and settings are shown in Table 1 and Table 2 below. Table 1. System Con

DS882DB1 9CDB42L73JUMPER PIN BLOCKPURPOSE POSITION FUNCTION SELECTEDJ50 +5 V +5 V main supply select[*] +5V EXTUSB+5 V supply source from J1+5 V supp