Cirrus-logic CS8421 Bedienungsanleitung

Copyright  Cirrus Logic, Inc. 2012 (All Rights Reserved)http://www.cirrus.com 32-bit, 192-kHz Asynchronous Sample Rate ConverterFeatures 175 dB Dyna

10 DS641F6CS8421PERFORMANCE SPECIFICATIONS (XTI/XTO = 27 MHz; Input signal = 1.000 kHz, 0 dBFS, Measurement Bandwidth = 20 to Fso/2 Hz, and Word Width

DS641F6 11CS8421CS8421DIGITAL FILTER CHARACTERISTICS 3. The equation for the group delay through the sample-rate converter is (56.581 / Fsi) + (55.658

12 DS641F6CS8421DIGITAL INPUT CHARACTERISTICSDIGITAL INTERFACE SPECIFICATIONS (GND = 0 V; all voltages with respect to 0 V.) SWITCHING SPECIFICATIONS(

DS641F6 13CS8421CS8421 6. After powering up the CS8421, RST should be held low until the power supplies and clocks are settled.7. The maximum possible

14 DS641F6CS84213. TYPICAL CONNECTION DIAGRAMSCS8421VD VLSerial Audio SourceILRCKISCLKSDINBYPASS+2.5 V +3.3 V or +5.0 V0.1 F0.1 FSerial Audio Input

DS641F6 15CS8421CS8421CS8421VD VLSerial Audio SourceILRCKISCLKSDINBYPASS+2.5 V +3.3 V or +5.0 V0.1 F0.1 FSerial Audio Input DeviceOLRCKOSCLKSDOUTXT

16 DS641F6CS84214. APPLICATIONSThe CS8421 is a 32-bit, high-performance, monolithic CMOS stereo asynchronous sample-rate converter.The digital audio d

DS641F6 17CS8421CS84214.2 Mode SelectionThe CS8421 uses the resistors attached to the MS_SEL, SAIF, and SAOF pins to determine the modes of operation.

18 DS641F6CS8421MS_SEL pin Input M/S Output M/S1.0 k ± 1% to GND Slave Slave1.96 k ± 1% to GND SlaveMaster (128 x Fso)4.02 k ± 1% to GND SlaveMaste

DS641F6 19CS8421CS84214.3 Sample Rate Converter (SRC)Multirate digital signal processing techniques are used to conceptually upsample the incoming dat

2 DS641F6CS8421General DescriptionThe CS8421 is a 32-bit, high-performance, monolithic CMOS stereo asynchronous sample-rate converter.Digital audio in

20 DS641F6CS84214.3.4 MutingThe SDOUT pin is set to all zero output (full mute) immediately after the RST pin is set high. When the output from the SR

DS641F6 21CS8421CS84214.3.7 ClockingIn order to ensure proper operation of the CS8421, the clock or crystal attached to XTI must simultaneous-ly satis

22 DS641F6CS8421 4.5 Reset, Power-Down, and Start-Up When RST is low, the CS8421 enters a low-power mode, all internal states are reset, and the outpu

DS641F6 23CS8421CS84214.6 Power Supply, Grounding, and PCB LayoutThe CS8421 operates from a VD = +2.5 V and VL = +3.3 V or +5.0 V supply. These suppli

24 DS641F6CS84215. PERFORMANCE PLOTS -200+0-180-160-140-120-100-80-60-40-20dBFS5k 20k10k 15kHz-200+0-180-160-140-120-100-80-60-40-20dBFS20k 80k40k

DS641F6 25CS8421CS8421 -200+0-180-160-140-120-100-80-60-40-20dBFS5k 20k10k 15kHz-200-60-180-160-140-120-100-80dBFS10k 40k20k 30kHzFigure 21. W

26 DS641F6CS8421 -200-60-180-160-140-120-100-80dBFS5k 20k10k 15kHz-200+0-180-160-140-120-100-80-60-40-20dBFS5k 20k10k 15kHzFigure 27. Wideban

DS641F6 27CS8421CS8421 -200+0-180-160-140-120-100-80-60-40-20dBFS20k 80k40k 60kHz-200+0-180-160-140-120-100-80-60-40-20dBFS10k 40k20k 30kHzFig

28 DS641F6CS8421 -150-120-147.5-145-142.5-140-137.5-135-132.5-130-127.5-125-122.5dBFS50k 175k75k 100k 125k 150kHz-150-120-147.5-145-142.5-140-

DS641F6 29CS8421CS8421 -150-120-147.5-145-142.5-140-137.5-135-132.5-130-127.5-125-122.5dBFS50k 175k75k 100k 125k 150kHz-150-120-147.5-145-142.5

DS641F6 3CS8421CS8421TABLE OF CONTENTS1. PIN DESCRIPTIONS ...

30 DS641F6CS8421 -140+0-130-120-110-100-90-80-70-60-50-40-30-20-10dBFS-140 +0-120 -100 -80 -60 -40 -20dBFS-140+0-130-120-110-100-90-80-70-60-5

DS641F6 31CS8421CS8421 -180-110-175-170-165-160-155-150-145-140-135-130-125-120-115dBFS-140 +0-120 -100 -80 -60 -40 -20dBFS-180-110-175-170-16

32 DS641F6CS8421 All performance plots represent typical performance. Measurements for all performance plots were taken under thefollowing c

DS641F6 33CS8421CS84216. PACKAGE DIMENSIONS Notes:1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do in

34 DS641F6CS84211. Dimensioning and tolerance per ASME Y 14.5M-1995.2. Dimensioning lead width applies to the plated terminal and is measured between

DS641F6 35CS8421CS84217. ORDERING INFORMATION8. REVISION HISTORY Release ChangesF1 Final ReleaseF2-Updated Thermal Pad pin description in “QFN Pin De

4 DS641F6CS8421Figure 18. Wideband FFT Plot (16k Points) 0 dBFS 1 kHz Tone, 48 kHz:44.1 kHz... 24Figure 19. Wideband FF

DS641F6 5CS8421CS84211. PIN DESCRIPTIONS 1.1 TSSOP PIN DESCRIPTIONS1234516678151413121191017181920SRC_UNLOCKXTOSAIFXTISAOFVDVLGNDGNDRSTMS_SELBYPASSOLR

6 DS641F6CS8421 Pin Name # Pin DescriptionXTO 1 Crystal Out (Output) - Crystal output for Master clock. See “Master Clock” on page 20. XTI 2Crystal/

DS641F6 7CS8421CS84211.2 QFN PIN DESCRIPTIONS 7654321891011121314151617181920Top-Down View20-pin QFN PackageThermal PadXTIXTOSRC_UNLOCSAIFSAOFISCLKSD

8 DS641F6CS8421 Pin Name # Pin DescriptionVD 1 Digital Power (Input) - Digital core power supply. Typically +2.5 V.GND 2 Ground (Input) - Ground for I

DS641F6 9CS8421CS84212. CHARACTERISTICS AND SPECIFICATIONS(All Min/Max characteristics and specifications are guaranteed over the Specified Operating