Cirrus-logic CS3318 Bedienungsanleitung

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Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
http://www.cirrus.com
8-Channel Analog Volume Control
Features
Complete Analog Volume Control
8 Independently Controllable Channels
3 Configurable Master Volume and Muting
Controls
Wide Adjustable Volume Range
-96 dB to +22 dB in ¼ dB Steps
Low Distortion & Noise
-112 dB THD+N
127 dB Dynamic Range
Noise-Free Level Transitions
Zero-Crossing Detection with
Programmable Time-Out
Low Channel-to-Channel Crosstalk
120 dB Inter-Channel Isolation
Comprehensive Serial Control Port
Supports I²C
®
and SPI
TM
Communication
Independent Control of up to 128 Devices
on a Shared 2-Wire I²C or 3-Wire SPI
Control Bus
Supports Individual and Grouped Control of
all CS3318 Devices on the I²C or SPI
Control Bus
Flexible Power Supply Voltages
±8 V to ±9 V Analog Supply
+3.3 V Digital Supply
Description
The CS3318 is an 8-channel digitally controlled analog
volume control designed specifically for high-end audio
systems. It features a comprehensive I²C/SPI serial
control port for easy device and volume configuration.
The CS3318 includes arrays of well-matched resistors
and complementary low-noise active output stages. A
total adjustable range of 118 dB, in ¼ dB steps, is
spread evenly over 96 dB of attenuation and 22 dB of
gain.
The CS3318 implements configurable zero-crossing
detection to provide glitch-free volume-level changes.
The I²C/SPI control interface provides for easy system
integration of up to 128 CS3318 devices over a single 2-
wire I²C or 3-wire SPI bus, allowing many channels of
volume control with minimal system controller I/O re-
quirements. Devices may be controlled on an individual
and grouped basis, simplifying simultaneous configura-
tion of a group of channels across multiple devices,
while allowing discrete control over all channels on an
individual basis.
The device operates from ±8 V to ±9 V analog supplies
and has an input/output voltage range of ±6.65 V to
±7.65 V. The digital control interface operates at +3.3 V.
The CS3318 is available in a 48-pin LQFP package in
Commercial grade (-10° to 70° C). The CS3318 Cus-
tomer Demonstration board is also available for device
evaluation. Refer to “Ordering Information” on page 44
for complete details.
±8 V to ±9 V
+3.3 V
8-Channel
Analog
Outputs
I²C/SPI
Serial
Control
8
+
_
Zero Crossing
Detector
I²C / SPI
Control
Port
8-Channel
Analog
Inputs
8
DECEMBER '06
DS693F1
CS3318
Seitenansicht 0
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Inhaltsverzeichnis

Seite 1 - Description

Copyright © Cirrus Logic, Inc. 2006(All Rights Reserved)http://www.cirrus.com8-Channel Analog Volume ControlFeatures Complete Analog Volume Control–

Seite 2 - TABLE OF CONTENTS

10 DS693F1CS3318CONTROL PORT SWITCHING CHARACTERISTICS - I²C FORMAT(Inputs: Logic 0 = DGND, Logic 1 = VD, CL=20pF)7. Data must be held for sufficient

Seite 3

DS693F1 11CS3318CONTROL PORT SWITCHING CHARACTERISTICS - SPI™ FORMAT(Inputs: Logic 0 = DGND, Logic 1 = VD, CL=20pF)8. Data must be held for sufficient

Seite 4 - LIST OF TABLES

12 DS693F1CS33183. TYPICAL CONNECTION DIAGRAM241403130212011REFI1REFI2REFI3REFI4REFI5REFI6REFI7REFI84843383328131813REFO1REFO2REFO3REFO4REFO5REFO6REFO

Seite 5 - 1. PIN DESCRIPTIONS

DS693F1 13CS33184. DETAILED BLOCK DIAGRAMControl Registers8ENOut36574SDA/MOSISCL/CLLKRESETMUTEAD0/CSOUT1+_1470 ~ -96 dB0 ~ +22 dB2RINROUTIN1REFI1Zero

Seite 6 - Pin Name # Pin Description

14 DS693F1CS33185. APPLICATIONS5.1 General DescriptionThe CS3318 is an 8-channel digitally controlled analog volume control designed for audio systems

Seite 7 - ABSOLUTE MAXIMUM RATINGS

DS693F1 15CS33185.2.2 Analog OutputsThe analog outputs are capable of driving 2kΩ loads to within 1.35 V of the analog supply rails and areshort-circu

Seite 8 - ANALOG CHARACTERISTICS

16 DS693F1CS33185.3.1 Recommended Power-Up Sequence1. Hold RESET low until the power supplies are stable. In this state, the control port is reset to

Seite 9 - SWITCHING CHARACTERISTICS

DS693F1 17CS33185.4 Volume & Muting Control ArchitectureThe CS3318’s volume and muting control architecture provides the ability to control each c

Seite 10

18 DS693F1CS3318Combining the multiple group addressing capabilities of the CS3318 (as detailed in section 5.8.2 onpage 24) with the internal master c

Seite 11

DS693F1 19CS33185.5 Volume ControlsThe CS3318 provides comprehensive volume control functionality, allowing each channel’s volume to bechanged on an i

Seite 12 - 3. TYPICAL CONNECTION DIAGRAM

2 DS693F1CS3318TABLE OF CONTENTS1. PIN DESCRIPTIONS ...

Seite 13 - 4. DETAILED BLOCK DIAGRAM

20 DS693F1CS3318Table 1 shows example volume settings using individual and master volume controls.Refer to Figure 6 on page 18 for a graphical represe

Seite 14 - 5. APPLICATIONS

DS693F1 21CS33185.6 Muting ControlsThe CS3318 provides flexible muting capabilities to complement its comprehensive volume control abilities.Each chan

Seite 15 - 5.3 Power-Up and Power-Down

22 DS693F1CS33185.7 Zero-Crossing DetectionThe CS3318 incorporates comprehensive zero-crossing detection features to provide for noise-free leveltrans

Seite 16

DS693F1 23CS33185.8 System Serial Control ConfigurationThe CS3318 includes a comprehensive serial control port which supports both SPI and I²C modes o

Seite 17 - 5.4.1 Control Mapping Matrix

24 DS693F1CS33185.8.2 Serial Control within a Multiple-CS3318 SystemThe CS3318 allows both independent and simultaneous control of up to 128 devices o

Seite 18

DS693F1 25CS3318input of device N+1 may be repeated for up to 128 devices per single CS signal. If more than 128 devicesare required in a system, sepa

Seite 19 - 5.5 Volume Controls

26 DS693F1CS3318Once this configuration process is complete, every device may be independently controlled with a standardSPI communication cycle using

Seite 20 - 5.5.3 Volume Limits

DS693F1 27CS33185.9 I²C/SPI Serial Control FormatsThe control port is used to access the internal registers of the CS3318. The control port has 2 mode

Seite 21 - 5.6.3 Hardware Mute Control

28 DS693F1CS3318Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shownin Figure 13, the write operati

Seite 22 - 5.7.2 Zero-Crossing Time-Out

DS693F1 29CS33186. CS3318 REGISTER QUICK REFERENCEThis table shows the register names and their associated default values.Addr Function 7 6 5 4 3 2 1

Seite 23

DS693F1 3CS33187.4.2 MUTE Input Polarity (Bit 4) ... 337

Seite 24

30 DS693F1CS331810h Master 1 MaskM1_Ch8M M1_Ch7M M1_Ch6M M1_Ch5M M1_Ch4M M1_Ch3M M1_Ch2M M1_Ch1Mpage 36 111 1 111111h Master 1 Vol-umeM1_Vol7 M1_Vol6

Seite 25

DS693F1 31CS33187. CS3318 REGISTER DESCRIPTIONSNotes:1. When addressing the CS3318 with the Individual Chip Address, all registers are read/write in I

Seite 26

32 DS693F1CS33187.2 ¼ dB Control - Address 09h7.2.1 ¼ dB Control (Bit 0 - 7)Default = 0Function:When set, ¼ dB of gain will be added to each bit’s res

Seite 27 - 5.9.1 I²C Mode

DS693F1 33CS33187.3 Mute Control - Address 0Ah7.3.1 Mute Channel X (Bit 0 - 7)Default = 0Function:Each bit controls the individual mute state of its r

Seite 28 - 5.9.2 SPI Mode

34 DS693F1CS33187.4.3 Channel B = Channel A (Bit 0 - 3)Default = 0Function:When this bit is set, Channel A and Channel B volume levels and muting cond

Seite 29 - Addr Function 7 6 5 4 3 2 1 0

DS693F1 35CS33187.5.2 Zero-Crossing Mode (Bits 1:0)Default = 01Function:These bits control the Zero-Crossing detection mode as shown in Table 9. Refer

Seite 30 - 30 DS693F1

36 DS693F1CS33187.8 Freeze Control - Address 0Fh7.8.1 Freeze (Bit 7)Default = 0Function:When the Freeze bit is set, the Freeze function allows modific

Seite 31

DS693F1 37CS33187.11 Master 1 Control - Address 12h7.11.1 Master 1 Mute (Bit 1)Default = 0Function:This bit controls the Master 1 mute state. When set

Seite 32

38 DS693F1CS3318In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dBresolution volume setting down to ½ dB

Seite 33

DS693F1 39CS3318as dictated by the ZCMode[1:0] and TimeOut[2:0] bits in the Device Config 2 register (see “DeviceConfiguration 2 - Address 0Ch” on pag

Seite 34

4 DS693F1CS3318LIST OF FIGURESFigure 1.Control Port Timing - I²C Format...

Seite 35 - 7.7.1 Power Down All (Bit 0)

40 DS693F1CS33187.18 Group 2 Chip Address 19h7.18.1 Group 2 Chip Address (Bits 7:1)SPI Mode Default = 1000000bI²C Mode Default = See Table 4 on page 2

Seite 36 - 7.8.1 Freeze (Bit 7)

DS693F1 41CS33187.20 Individual Chip Address 1Bh7.20.1 Individual Chip Address (Bits 7:1)SPI Mode Default = 1000000bI²C Mode Default = See Table 4 on

Seite 37

42 DS693F1CS33188. PARAMETER DEFINITIONSDynamic RangeFull-scale (RMS) signal to broadband noise ratio. The broadband noise is measured over the specif

Seite 38

DS693F1 43CS33189. PACKAGE DIMENSIONS10.THERMAL CHARACTERISTICS AND SPECIFICATIONS 1. θJA is specified according to JEDEC specifications for multi-la

Seite 39 - 7.17.1 Master 3 Mute (Bit 1)

44 DS693F1CS331811.ORDERING INFORMATION12.REVISION HISTORYProduct Description Package Pb-Free Grade Temp Range Container Order #CS33188-ChannelAnalog

Seite 40

DS693F1 5CS33181. PIN DESCRIPTIONSPin Name # Pin DescriptionIN1IN2IN3IN4IN5IN6IN7IN8142393229221912Analog Inputs (Input) - The full-scale level is spe

Seite 41

6 DS693F1CS3318OUT1OUT2OUT3OUT4OUT5OUT6OUT7OUT84744373427241714Analog Outputs (Output) - The full-scale output level is specified in the Analog Charac

Seite 42 - 8. PARAMETER DEFINITIONS

DS693F1 7CS33182. CHARACTERISTICS AND SPECIFICATIONSAll Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditi

Seite 43 - 48L LQFP PACKAGE DRAWING

8 DS693F1CS3318ANALOG CHARACTERISTICS(Test conditions (unless otherwise specified): RS=0; RL=20kΩ; CL= 20 pF; 10 Hz to 20 kHz Measurement Bandwidth)3.

Seite 44 - 12.REVISION HISTORY

DS693F1 9CS3318DIGITAL INTERFACE CHARACTERISTICSMUTE SWITCHING CHARACTERISTICS(Inputs: Logic 0 = DGND, Logic 1 = VD)6. The MUTE active state (low/high

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