Cirrus-logic CS3318 Bedienungsanleitung PDF herunterladen (Seite 11)

DS693F1 11

CS3318

CONTROL PORT SWITCHING CHARACTERISTICS - SPI™ FORMAT

(Inputs: Logic 0 = DGND, Logic 1 = VD, C

=20pF)

8. Data must be held for sufficient time to bridge the transition time of CCLK.

9. For f

sck

<1 MHz.

Parameter Symbol Min Max Unit

CCLK Clock Frequency f

sck

06.0MHz

RESET

Rising Edge to CS Falling t

srs

100 - ns

High Time Between Transmissions t

csh

1.0 - μs

Falling to CCLK Edge t

css

20 - ns

CCLK Low Time t

scl

66 - ns

CCLK High Time t

sch

66 - ns

CDIN to CCLK Rising Setup Time t

dsu

40 - ns

CCLK Rising to DATA Hold Time (Note 8) t

15 - ns

Rise Time of CCLK and CDIN (Note 9) t

- 100 ns

Fall Time of CCLK and CDIN (Note 9) t

- 100 ns

dsu

sch

scl

MOSI

css

csh

RESET

srs

CCLK

Figure 2. Control Port Timing - SPI Format

1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 43 44

Features 1
Description 1
TABLE OF CONTENTS 2
LIST OF FIGURES 4
LIST OF TABLES 4
1. PIN DESCRIPTIONS 5
6 DS693F1 6
Pin Name # Pin Description 6
ABSOLUTE MAXIMUM RATINGS 7
ANALOG CHARACTERISTICS 8
SWITCHING CHARACTERISTICS 9
3. TYPICAL CONNECTION DIAGRAM 12
4. DETAILED BLOCK DIAGRAM 13
5. APPLICATIONS 14
5.2.2 Analog Outputs 15
5.3 Power-Up and Power-Down 15
5.4.1 Control Mapping Matrix 17
5.5.2 Master Volume Controls 19
5.5 Volume Controls 19
5.5.3 Volume Limits 20
5.6 Muting Controls 21
5.6.2 Master Mute Controls 21
5.6.3 Hardware Mute Control 21
5.7 Zero-Crossing Detection 22
5.7.1 Zero-Crossing Modes 22
5.7.2 Zero-Crossing Time-Out 22
5.9.1 I²C Mode 27
5.9.2 SPI Mode 28
DS693F1 29 29
Addr Function 7 6 5 4 3 2 1 0 29
30 DS693F1 30
7.7.1 Power Down All (Bit 0) 35
7.8.1 Freeze (Bit 7) 36
7.17.1 Master 3 Mute (Bit 1) 39
8. PARAMETER DEFINITIONS 42
9. PACKAGE DIMENSIONS 43
48L LQFP PACKAGE DRAWING 43
11.ORDERING INFORMATION 44
12.REVISION HISTORY 44

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