Cirrus-logic CS2300-OTP Bedienungsanleitung

Copyright  Cirrus Logic, Inc. 2010(All Rights Reserved)http://www.cirrus.comFractional-N Clock Multiplier with Internal LCOFeatures Clock Multiplier

CS2300-OTP10 DS844F2 Figure 6. Hybrid Analog-Digital PLLNDigital FilterFrequency Comparator forFrac-N GenerationFrequency Reference Clock Delta-Sigm

CS2300-OTPDS844F2 115. APPLICATIONS5.1 One Time ProgrammabilityThe one time programmable (OTP) circuitry in the CS2300-OTP allows for pre-configuratio

CS2300-OTP12 DS844F2to as wander. In others it may be preferable to remove only higher frequency jitter, allowing the input wan-der to pass through th

CS2300-OTPDS844F2 135.4 Output to Input Frequency Ratio Configuration5.4.1 User Defined Ratio (RUD)The User Defined Ratio, RUD, is a 32-bit un-signed

CS2300-OTP14 DS844F2Ratio modifiers which would produce an overflow or truncation of REFF should not be used. In all cases,the maximum and minimum all

CS2300-OTPDS844F2 155.5 PLL Clock OutputThe PLL clock output pin (CLK_OUT) provides a buffered version of the output of the frequency synthesizer.The

CS2300-OTP16 DS844F25.6 Auxiliary OutputThe auxiliary output pin (AUX_OUT) can be mapped, as shown in Figure 12, to one of three signals: inputclock (

CS2300-OTPDS844F2 175.7.2 M2 Mode Pin FunctionalityM2 usage is mapped to one of the optional special functions via the M2Config[2:0] global parameter.

CS2300-OTP18 DS844F25.8 Clock Output Stability Considerations5.8.1 Output SwitchingThe CS2300-OTP is designed such that re-configuration of the clock

CS2300-OTPDS844F2 196. PARAMETER DESCRIPTIONSAs mentioned in Section 5.1 on page 11, there are two different kinds of parameter configuration sets, Mo

CS2300-OTPDS844F2 2TABLE OF CONTENTS1. PIN DESCRIPTION ...

CS2300-OTP20 DS844F26.1.2 Auxiliary Output Source Selection (AuxOutSrc[1:0])Selects the source of the AUX_OUT signal.Note: When set to 11, the AuxLock

CS2300-OTPDS844F2 216.3.4 M2 Pin Configuration (M2Config[2:0])Controls which special function is mapped to the M2 pin.6.3.5 Clock Input Bandwidth (Clk

CS2300-OTP22 DS844F27. CALCULATING THE USER DEFINED RATIONote: The software for use with the evaluation kit has built in tools to aid in calculating a

CS2300-OTPDS844F2 238. PROGRAMMING INFORMATIONField programming of the CS2300-OTP is achieved using the hardware and software tools included with theC

CS2300-OTP24 DS844F29. PACKAGE DIMENSIONSNotes: 1. Reference document: JEDEC MO-1872. D does not include mold flash or protrusions which is 0.15 mm ma

CS2300-OTPDS844F2 2510.ORDERING INFORMATIONThe CS2300-OTP is ordered as an un-programmed device. The CS2300-OTP can also be factory programmed forlarg

CS2300-OTP26 DS844F2Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find one n

CS2300-OTPDS844F2 3LIST OF FIGURESFigure 1. Typical Connection Diagram ...

CS2300-OTP4 DS844F21. PIN DESCRIPTIONPin Name # Pin DescriptionVD 1 Digital Power (Input) - Positive power supply for the digital and analog sections.

CS2300-OTPDS844F2 52. TYPICAL CONNECTION DIAGRAM GNDM2M1FILTPFrequency Reference CLK_INFILTNCLK_OUTAUX_OUT0.1 µFVD+3.3 VM0System Microcontroller1 µF

CS2300-OTP6 DS844F23. CHARACTERISTICS AND SPECIFICATIONS RECOMMENDED OPERATING CONDITIONSGND = 0 V; all voltages with respect to ground. (Note 1)Notes

CS2300-OTPDS844F2 7AC ELECTRICAL CHARACTERISTICSTest Conditions (unless otherwise specified): VD = 3.1 V to 3.5 V; TA = -10°C to +70°C (Commercial Gra

CS2300-OTP8 DS844F2PLL PERFORMANCE PLOTSTest Conditions (unless otherwise specified): VD = 3.3 V; TA=25°C; CL=15pF; fCLK_OUT= 12.288 MHz; fCLK_IN= 12.

CS2300-OTPDS844F2 94. ARCHITECTURE OVERVIEW4.1 Delta-Sigma Fractional-N Frequency SynthesizerThe core of the CS2300 is a Delta-Sigma Fractional-N Freq