Cirrus-logic CRD42L52 Bedienungsanleitung

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.comReference Design and Peripheral Driver Board for CS42L52Reference Design

10 DS680RD1CRD42L524.1 CODEC Configuration TabThe “CODEC Configuration” tab provides high-level control of various configurations for the CRD42L52.Sta

DS680RD1 11CRD42L524.2 Analog Input Volume TabThe “Analog Input Volume” tab provides high-level control of all volume settings in the ADC of the CS42L

12 DS680RD1CRD42L524.3 DSP Engine TabThe “DSP Engine” tab provides high-level control of the SDIN (PCM) data volume level, the ADC out-put/SDIN mix vo

DS680RD1 13CRD42L524.4 Analog and PWM Output Volume TabThe “Analog and PWM Output Volume” tab provides high-level control of the CS42L52 input passthr

14 DS680RD1CRD42L524.5 Register Maps TabThe Advanced Register Debug tab provides low-level control of the CS42L52 individual register settings.Registe

DS680RD1 15CRD42L525. PERFORMANCE PLOTSTest conditions (unless otherwise specified): Input test signal is a full-scale 997 Hz sine wave; measurement b

16 DS680RD1CRD42L52-140+0-130-120-110-100-90-80-70-60-50-40-30-20-10dBr A20 20k50 100 200 500 1k 2k 5k 10kHzFigure 13. FFT - S/PDIF In to HP Out @ -6

DS680RD1 17CRD42L52Figure 19. THD + N - Line In to HP Out (Dig. LB)-90-60-88-86-84-82-80-78-76-74-72-70-68-66-64-62dBr A20 20k50 100 200 500 1k 2k 5k

18 DS680RD1CRD42L526. SYSTEM CONNECTIONS & INTERFACEOn CDB42LDB1:On CRD42L52:Connector/InterfaceReference DesignatorInput/Output DescriptionAAABT1

DS680RD1 19CRD42L52CRD42L52 AND CDB42LDB1 BLOCK DIAGRAM Figure 20. Block DiagramCS42L52LeftRight+-+-I²CControl PortSAIPower SupplyLine InputHeadphone

2 DS680RD1CRD42L52TABLE OF CONTENTS1. SYSTEM OVERVIEW ...

20 DS680RD1CRD42L527. CRD42L52 SCHEMATICSFigure 21. CS42L52 and Analog I/O

DS680RD1 21CRD42L528. CDB42LDB1 SCHEMATICSFigure 22. S/PDIF Input/Output

22 DS680RD1CRD42L52 Figure 23. Microcontroller, Push Buttons and LED Indicators

DS680RD1 23CRD42L529. CRD42L52 LAYOUT Figure 24. Silkscreen Top Figure 25. Silkscreen BottomFigure 26. Top-Side LayerFigure 27. Internal Layer (Gr

24 DS680RD1CRD42L5210.CDB42LDB1 LAYOUTFigure 30. Silkscreen TopFigure 31. Silkscreen Bottom

DS680RD1 25CRD42L52Figure 32. Top-Side LayerFigure 33. Layer 2

26 DS680RD1CRD42L52Figure 34. Layer 3Figure 35. Bottom-Side Layer

DS680RD1 27CRD42L5211.REVISION HISTORY Release ChangesRD1 Initial Release

28 DS680RD1CRD42L52Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the on

DS680RD1 3CRD42L52LIST OF FIGURESFigure 1.Quick-Start Guide ...

4 DS680RD1CRD42L521. SYSTEM OVERVIEW The CRD42L52 provides a quick and general overview of the features in the CS42L52 CODEC in addition to pro-viding

DS680RD1 5CRD42L521.5 Oscillator (Y1)The on-board oscillator provides the system master clock when the digital audio receiver is powered downor when a

6 DS680RD1CRD42L522. QUICK-START GUIDEThe following figure is supplied for user convenience as a simplified quick-start guide. Refer to Section 1 on p

DS680RD1 7CRD42L523. CONFIGURATION OPTIONSThis section provides a deeper understanding of on-board circuitry and digital clock and data signal routing

8 DS680RD1CRD42L52Table 2 shows expected performance characteristics when the boards are configured to make analog inputto digital output measurements

DS680RD1 9CRD42L524. SOFTWARE MODE CONTROLThe CRD42L52 may be used with the CDB42LDB1 driver board and the Microsoft® Windows-based FlexGUI graph-ical