Cirrus-logic CDB42L51 Bedienungsanleitung

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Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
http://www.cirrus.com
Evaluation Board for CS42L51
Features
MUXed Analog Input
Stereo RCA Inputs
Two Microphone Input Jacks
MUXed Analog Output
Stereo RCA Output (w/Optional Load or
LPF)
Stereo Headphone Jack
Mono Speaker Driver w/Banana Posts
8 kHz to 96 kHz S/PDIF Interface
CS8415 Digital Audio Receiver
CS8406 Digital Audio Transmitter
I/O Stake Headers
External Control Port Accessibility
External DSP Serial Audio I/O Accessibility
Independent, Regulated Supplies
1.8 V to 3.3 V Logic Interface
Hardware Control
11 Pre-Defined Switch Settings
FlexGUI S/W Control - Windows
®
Compatible
Pre-Defined & User-Configurable Scripts
Layout and Grounding Recommendations
Description
The CDB42L51 evaluation board is an excellent means
for evaluating the CS42L51 CODEC. Evaluation re-
quires an analog/digital signal source and analyzer, and
power supplies. Optionally, a Windows
PC-compatible
computer may be used to evaluate the CS42L51 in Soft-
ware Mode.
System timing can be provided by the CS8415, by the
CS42L51 with supplied master clock, or by an I/O stake
header with a DSP connected.
RCA phono jacks are provided for the CS42L51 analog
inputs and outputs. 1/8th inch jacks are also available
for microphone input and headphone output. Digital
data I/O is available via RCA phono or optical connec-
tors to the CS8415 and CS8406.
The Windows software provides a GUI to make config-
uration of the CDB42L51 easy. The software
communicates through the PC’s serial port to configure
the control port registers so that all features of the
CS42L51 can be evaluated. The evaluation board may
also be configured to accept external timing and data
signals for operation in a user application during system
development.
ORDERING INFORMATION
CDB42L51 Evaluation Board
Analog Output
(Line + Headphone)
Analog Input
(Line + MIC)
Software Mode
Control Port
CS42L51
S/PDIF Input
(CS8415)
S/PDIF Output
(CS8406)
Clocks/Data Header
I²C/SPI Header
FPGA
Oscillator
(socket)
Reset
MCLK
Reset
Reset
MCLK
Reset
Hardware Mode
Switches
OCTOBER '07
DS679DB2
CDB42L51
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Inhaltsverzeichnis

Seite 1 - CDB42L51

Copyright © Cirrus Logic, Inc. 2007 (All Rights Reserved)http://www.cirrus.comEvaluation Board for CS42L51Features MUXed Analog Input– Stereo RCA Inp

Seite 2

10 DS679DB2CDB42L512.3 ADC Volume Controls TabThe “ADC Volume Controls” tab provides high-level control of all volume settings in the ADC of theCS42L5

Seite 3

DS679DB2 11CDB42L512.4 DAC Volume Controls TabThe “DAC Volume Controls” tab provides high-level control of all volume settings in the DAC of theCS42L5

Seite 4 - 1. SYSTEM OVERVIEW

12 DS679DB2CDB42L512.5 Register Maps TabThe Advanced Register Debug tab provides low-level control of the CS42L51 individual register settings.Registe

Seite 5

DS679DB2 13CDB42L513. HARDWARE MODE CONTROLThe CDB may be configured without the use of a software control port through the use of two switches, “FPGA

Seite 6

14 DS679DB2CDB42L51OscillatorMCLKLRCK/SCLKSDINSDOUTCS42L51I/O HeaderMCLKSDOUTLRCK/SCLKSDINCS8406CS8415RMCK(256Fs)OLRCK/OSCLKSDOUT(LJ)OMCK(256Fs)ILRCK/

Seite 7 - 2. SOFTWARE MODE CONTROL

DS679DB2 15CDB42L51OscillatorMCLKLRCK/SCLKSDINSDOUTCS42L51I/O HeaderMCLKSDOUTLRCK/SCLKSDINCS8406CS8415RMCK(256Fs)OLRCK/OSCLKSDOUT(LJ)OMCK(256Fs)ILRCK/

Seite 8

16 DS679DB2CDB42L51OscillatorMCLKLRCK/SCLKSDINSDOUTCS42L51I/O HeaderMCLKSDOUTLRCK/SCLKSDINCS8406CS8415RMCK(256Fs)OLRCK/OSCLKSDOUT(LJ)OMCK(256Fs)ILRCK/

Seite 9

DS679DB2 17CDB42L513.2 CS42L51 H/W ControlThe stand-alone “CS42L51 H/W Control” switch controls the Hardware Mode options of the CS42L51. Adescription

Seite 10

18 DS679DB2CDB42L51 JMP LABEL PURPOSE POSITION FUNCTION SELECTEDJ31 VLSelects source of voltage for the VL supply*+1.8V Voltage source is +1.8 V regul

Seite 11

DS679DB2 19CDB42L515. CDB42L51 BLOCK DIAGRAM Figure 17. Block DiagramAnalog Output(Line + Headphone)Analog Input(Line + MIC)Software Mode Control Por

Seite 12

2 DS679DB2CDB42L51TABLE OF CONTENTS1. SYSTEM OVERVIEW ...

Seite 13 - 3. HARDWARE MODE CONTROL

DS679DB2 20CDB42L516. CDB42L51 SCHEMATICSFigure 18. CS42L51 and Analog I/O (Schematic Sheet 1)

Seite 14

DS679DB2 21CDB42L51Figure 19. S/PDIF I/O (Schematic Sheet 2)

Seite 15

DS679DB2 22CDB42L51Figure 20. FPGA (Schematic Sheet 3)

Seite 16

DS679DB2 23CDB42L51Figure 21. Level Shifters & I/O Stake Header (Schematic Sheet 4)

Seite 17

DS679DB2 24CDB42L51Figure 22. Control Port I/O (Schematic Sheet 5)

Seite 18

DS679DB2 25CDB42L51Figure 23. Power (Schematic Sheet 6)

Seite 19 - 5. CDB42L51 BLOCK DIAGRAM

DS679DB2 26CDB42L517. CDB42L51 LAYOUTFigure 24. Silk Screen

Seite 20 - 6. CDB42L51 SCHEMATICS

DS679DB2 27CDB42L51Figure 25. Top-Side Layer

Seite 21

DS679DB2 28CDB42L51Figure 26. Bottom-Side Layer

Seite 22

DS679DB2 29CDB42L518. ERRATAAlthough the CS42L51 does support VL power supply levels of both +1.8 V and +2.5 V, these levels are not sup-ported by the

Seite 23

DS679DB2 3CDB42L51Figure 23. Power (Schematic Sheet 6) ...

Seite 24

4 DS679DB2CDB42L511. SYSTEM OVERVIEW The CDB42L51 evaluation board is an excellent means for evaluating the CS42L51 CODEC. Digital audio signal interf

Seite 25

DS679DB2 5CDB42L511.5 CS8406 Digital Audio TransmitterA complete description of the CS8406 transmitter (Figure 19 on page 21) and a discussion of the

Seite 26 - 7. CDB42L51 LAYOUT

6 DS679DB2CDB42L511.9 Analog InputRCA connectors supply the line-level analog inputs through an AC-coupled passive filter. The signal fromthese inputs

Seite 27

DS679DB2 7CDB42L512. SOFTWARE MODE CONTROLThe CDB42L51 may be used with the Microsoft® Windows-based FlexGUI graphical user interface, allowing soft-w

Seite 28

8 DS679DB2CDB42L512.1 General Configuration TabThe “General Configuration” tab provides high-level control of signal routing on the CDB42L51. This tab

Seite 29 - 9. REVISION HISTORY

DS679DB2 9CDB42L512.2 CODEC Configuration TabThe “CODEC Configuration” tab provides high-level control of all setup configurations for the CS42L51. St

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