Copyright © Cirrus Logic, Inc. 2006(All Rights Reserved)http://www.cirrus.comEvaluation Board for CS42L52Features Stereo Analog Inputs– 4 Stereo Audi
10 DS680DB1CDB42L522.4 DSP Engine TabThe “DSP Engine” tab provides high-level control of the SDIN (PCM) data volume level, the ADC out-put/SDIN mix vo
DS680DB1 11CDB42L522.5 Analog and PWM Output Volume TabThe “Analog and PWM Output Volume” tab provides high-level control of the CS42L52 DAC output an
12 DS680DB1CDB42L522.6 Register Maps TabThe Register Maps tabs provide low-level control of the CS42L52, CS8416, CS8406, CS8421, FPGA andGPIO register
DS680DB1 13CDB42L523. SYSTEM CONNECTIONS AND JUMPERS CONNECTOR REF INPUT/OUTPUT SIGNAL PRESENTVP J35 Input +1.6 V to +5.25 V Power Supply. GND J4 I
14 DS680DB1CDB42L52 JMP LABEL PURPOSE POSITION FUNCTION SELECTEDJ31 VLSelects source of voltage for the VL supply*+1.8V Voltage source is +1.8 V regul
DS680DB1 15CDB42L52J3 HP/LINEB_R_LOADSelects 32 or 16 ohm load for HP/LINE_OUTB (DAC out)1 - 2 16 ohm load selected. 2 - 3 32 ohm load selected.J9 HP/
16 DS680DB1CDB42L52CDB42L51 BLOCK DIAGRAM Figure 7. Block DiagramAnalog InputsSoftware Mode Control Port CS42L52S/PDIF I/O (CS8406 + CS8416)Clocks/Da
DS680DB1 17CDB42L524. CDB42L51 SCHEMATICSFigure 8. CS42L52 & Analog I/O (Schematic Sheet 1)
18 DS680DB1CDB42L52Figure 9. S/PDIF & Digital Interface (Schematic Sheet 2)
DS680DB1 19CDB42L52Figure 10. Micro & FPGA Control (Schematic Sheet 3)Fi 11
2 DS680DB1CDB42L52TABLE OF CONTENTS1. SYSTEM OVERVIEW ...
20 DS680DB1CDB42L52Figure 11. Power (Schematic Sheet 4)
DS680DB1 21CDB42L525. CDB42L51 LAYOUTFigure 12. Silk Screen
22 DS680DB1CDB42L52Figure 13. Top-Side Layer
DS680DB1 23CDB42L52Figure 14. GND (Layer 2)
24 DS680DB1CDB42L52Figure 15. Power (Layer 3)
DS680DB1 25CDB42L52Figure 16. Bottom Side Layer
26 DS680DB1CDB42L526. REVISION HISTORYRevision ChangesDB1 Initial ReleaseContacting Cirrus Logic SupportFor all product questions and inquiries, conta
DS680DB1 3CDB42L521. SYSTEM OVERVIEWThe CDB42L52 platform provides analog and digital interfaces to the CS42L52 and allows for external DSP and I²C® i
4 DS680DB1CDB42L521.5 CS8406 Digital Audio TransmitterA complete description of the CS8406 transmitter (Figure 4 on page 17) and a discussion of the d
DS680DB1 5CDB42L521.9 Analog InputsFour stereo jack connectors supply the AC coupled line-level analog inputs to the CS42L52. Differential orsingle en
6 DS680DB1CDB42L522. SOFTWARE MODE CONTROLThe CDB42L52 may be used with the Microsoft Windows®-based FlexGUI graphical user interface, allowing soft-w
DS680DB1 7CDB42L522.1 Board Configuration TabThe “Board Configuration” tab provides high-level control of signal routing on the CDB42L52. This tab als
8 DS680DB1CDB42L522.2 CODEC Configuration TabThe “CODEC Configuration” tab provides high-level control of the CS42L52 register settings. Status text d
DS680DB1 9CDB42L522.3 Analog Input Volume TabThe “Analog Input Volume” tab provides high-level control of all volume settings in the ADC of the CS42L5
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