Cirrus-logic CDB4244 Bedienungsanleitung

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Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
http://www.cirrus.com
CS4244 Evaluation Board
Features
Multiple Analog Input Filter Options
Active Single Ended to Differential
Passive Differential
Multiple Analog Output Filter Options
Passive Single Ended & Differential
Active Single Ended & Differential
Active Differential to Single Ended
Versatile S/PDIF Interface
CS8416 Digital Audio Receiver
CS8406 Digital Audio Transmitter
CS2000 Clock Synthesizer
External Connection Headers
Control Port Accessibility
DSP Serial Audio I/O Accessibility
Windows
®
Compatible FlexGUI S/W Control
Allows Easy Configuration of the CDB4244
Predefined & User-Configurable Scripts
Description
The CDB4244 evaluation board is an excellent platform
designed to facilitate evaluation of the CS4244 multi-
channel CODEC. Use of the board requires an ana-
log/digital signal source, an audio analyzer, and power
supplies. A Windows
PC-compatible computer is also
needed in order to configure the board.
System timing for the I²S and Left-Justified serial inter-
face formats can be accomplished using S/PDIF I/O or
crystal-based timing hardware on the CDB4244. An ex-
ternal DSP interface header supports I²S, Left-Justified,
and TDM serial interface formats.
1/8” audio jacks, three-pin headers, and RCA phono
jacks are provided for the CS4244 analog I/O connec-
tions. Digital I/O connections are accomplished through
RCA phono jacks or optical connectors leading to the
S/PDIF receiver and transmitter.
The Windows-based software available online makes
configuring the CDB4244 easy. The software commu-
nicates through the PC’s USB port to control the
CS4244, the S/PDIF receiver and transmitter, and the
clock synthesizer. These devices can also be con-
trolled through an external control header for easy in-
system evaluation.
ORDERING INFORMATION
CDB4244 Evaluation Board
CS4244
S/PDIF Input
(CS8416)
S/PDIF Output
(CS8406)
Clock Synthesis
(CS2000)
Osc. Crystal
DSP Header
Control
Header
USB Control
Port
Analog Inputs
- Active Single Ended to
Differential
- Passive Differential
Analog Outputs
- Passive Single Ended
& Differential
- Active Single Ended &
Differential
- Active Differential to
Single Ended
MAR '11
DS900DB2
CDB4244
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Inhaltsverzeichnis

Seite 1 - CS4244 Evaluation Board

Copyright  Cirrus Logic, Inc. 2011(All Rights Reserved)http://www.cirrus.comCS4244 Evaluation BoardFeatures Multiple Analog Input Filter Options– Ac

Seite 2 - LIST OF FIGURES

10 DS900DB2CDB42442.3 Volume Control TabThe “Volume Control” tab provides high-level control of all volume-related settings for each ADC and DACof the

Seite 3 - LIST OF TABLES

DS900DB2 11CDB42442.4 Register Maps TabThe “Register Maps” tab provides low-level control over the register-level settings of the CS4244, CS8416,CS840

Seite 4 - 1 SYSTEM OVERVIEW

12 DS900DB2CDB42442.5 Predefined Sample ScriptsThe CDB4244 FlexGUI software comes furnished with four scripts that can quickly configure the board for

Seite 5 - 1.7 Oscillator

DS900DB2 13CDB42443 MASTER CLOCK CONFIGURATIONThe CDB4244 offers many options for generating a system master clock. The master clock can be recovered

Seite 6 - 1.10 Analog Outputs

14 DS900DB2CDB42443.2 CS2000-Generated Master ClockFor greater flexibility, the CS2000 can be configured to provide a master clock at several differen

Seite 7 - 2 SOFTWARE MODE CONTROL

DS900DB2 15CDB42444 ANALOG INPUT FILTERSThe CDB4244 makes it possible to realize two different analog input filter options for interfacing with the CS

Seite 8 - 2.1 Board Control Tab

16 DS900DB2CDB4244Either filter option is realized by populating certain components and removing others. Section 4.3 containsa comprehensive list of c

Seite 9 - 2.2 CODEC Control Tab

DS900DB2 17CDB42445 ANALOG OUTPUT FILTERSThe CDB4244 allows the user to evaluate the CS4244 using five different output filter configurations: passive

Seite 10 - 2.3 Volume Control Tab

18 DS900DB2CDB4244Note that there is a phase reversal on the analog audio output connections of the CDB4244 when using anactive output filter; this is

Seite 11 - 2.4 Register Maps Tab

DS900DB2 19CDB42445.2 Analog Output Filter ConfigurationThe following table lists the components that must be present or absent in order to realize ea

Seite 12 - 2.5 Predefined Sample Scripts

2 DS900DB2CDB4244TABLE OF CONTENTS1 SYSTEM OVERVIEW ...

Seite 13 - 3 MASTER CLOCK CONFIGURATION

20 DS900DB2CDB42446 SYSTEM CONNECTIONS AND JUMPER PIN BLOCKS6.1 System ConnectionsNotes:3. Connecting to the PC through a USB hub is not recommended.4

Seite 14 - 3.4 Miscellaneous Options

DS900DB2 21CDB42447. Silk-screen labels are placed near these connectors to indicate the phase reversal between the active(“A”) and passive (“P”) conf

Seite 15 - 4 ANALOG INPUT FILTERS

22 DS900DB2CDB42447 CDB4244 BLOCK DIAGRAMFigure 9. CDB4244 Block DiagramCS4244S/PDIF Input(CS8416)S/PDIF Output(CS8406)Clock Synthesis(CS2000)Osc. Cr

Seite 16

DS900DB2 23CDB42448 CDB4244 SCHEMATICFigure 10. CS4244 (Schematic Sheet 1)

Seite 17 - 5 ANALOG OUTPUT FILTERS

24 DS900DB2CDB4244Figure 11. S/PDIF I/O (Schematic Sheet 2)

Seite 18

DS900DB2 25CDB4244Figure 12. USB I/O (Schematic Sheet 3)

Seite 19

26 DS900DB2CDB4244Figure 13. Analog Input Channels 1 & 2 (Schematic Sheet 4)

Seite 20 - 6.1 System Connections

DS900DB2 27CDB4244Figure 14. Analog Input Channels 3 & 4 (Schematic Sheet 5)

Seite 21 - 6.3 Test Points

28 DS900DB2CDB4244Figure 15. Analog Output Channels 1 & 2 (Schematic Sheet 6)

Seite 22 - 7 CDB4244 BLOCK DIAGRAM

DS900DB2 29CDB4244Figure 16. Analog Output Channels 3 & 4 (Schematic Sheet 7)

Seite 23 - 8 CDB4244 SCHEMATIC

DS900DB2 3CDB4244Figure 14.Analog Input Channels 3 & 4 (Schematic Sheet 5) ... 27F

Seite 24 - 24 DS900DB2

30 DS900DB2CDB4244Figure 17. Power (Schematic Sheet 8)

Seite 25 - DS900DB2 25

DS900DB2 31CDB42449 CDB4244 LAYOUTFigure 18. Silk Screen

Seite 26 - 26 DS900DB2

32 DS900DB2CDB4244Figure 19. Top Side (Layer 1)

Seite 27 - DS900DB2 27

DS900DB2 33CDB4244Figure 20. Ground Plane (Layer 2)

Seite 28 - 28 DS900DB2

34 DS900DB2CDB4244Figure 21. Power Plane (Layer 3)

Seite 29 - DS900DB2 29

DS900DB2 35CDB4244Figure 22. Bottom Side (Layer 4)

Seite 30 - 30 DS900DB2

36 DS900DB2CDB424410 REVISION HISTORYRevision ChangesDB1 – Initial ReleaseDB2 – Updated “Features” on page 1 to remove list of optional single-ended i

Seite 31 - 9 CDB4244 LAYOUT

4 DS900DB2CDB42441 SYSTEM OVERVIEWThe CDB4244 platform provides analog and digital interfaces to the CS4244 and allows for external DSP and I²CTMcontr

Seite 32 - 32 DS900DB2

DS900DB2 5CDB42441.5 CS8416 Digital Audio ReceiverThe CS8416 S/PDIF receiver (Figure 11 on page 24) converts the incoming S/PDIF data stream from theo

Seite 33 - DS900DB2 33

6 DS900DB2CDB42441.9 Analog InputsThe CDB4244 can accept single-ended analog input signals through the RCA phono jacks on each channel.An active singl

Seite 34 - 34 DS900DB2

DS900DB2 7CDB42442 SOFTWARE MODE CONTROLThe CDB4244 can be used with the Microsoft Windows®–based FlexGUI graphical user interface, allowing softwarec

Seite 35 - DS900DB2 35

8 DS900DB2CDB42442.1 Board Control TabThe “Board Control” tab provides high-level control of the clocking and data options within the CDB4244. Adescri

Seite 36 - 10 REVISION HISTORY

DS900DB2 9CDB42442.2 CODEC Control TabThe “CODEC Control” tab provides high-level control of many CS4244 register settings. Status text detailingthe C

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